M41T82 M41T83
Clock operation
Table 4. M41T83 clock/control register map (32 bytes)(1)
Addr
D7
D6
D5
D4
D3
D2
D1
D0
Function/range BCD
format
00h
0.1 seconds
0.01 seconds
seconds
00-99
01h ST
02h
0
03h CB1
04h
0
05h
0
10 seconds
10 minutes
CB0
10 hours
0
0
0
0
10 date
seconds
Minutes
Hours (24 hour format)
0
Day of week
Date: day of month
seconds
Minutes
Century/hours
Day
Date
00-59
00-59
0-3/00-23
01-7
01-31
06h
0
0
0
10M
Month
07h
10 years
Year
08h OUT
FT
DCS DC4 DC3 DC2 DC1
09h OFIE BMB4 BMB3 BMB2 BMB1 BMB0 RB1
DC0
RB0
Month
Year
Digital calibration
Watchdog
01-12
00-99
0Ah A1IE SQWE
0Bh RPT14 RPT15
ABE
Al1
10M
AI1 10 date
Alarm 1month
Alarm1 date
Al1 month
Al1 date
01-12
01-31
0Ch RPT13 HT
AI1 10 hour
Alarm1 hour
0Dh RPT12
Alarm1 10 minutes
Alarm1 minutes
0Eh RPT11
0Fh WDF
Alarm1 10 seconds
AF1 AF2(2) BL
Alarm1 seconds
TF
OF
0
0
10h
Timer countdown value
Al1 hour
Al1 min
Al1 sec
Flags
Timer value
00-23
00-59
00-59
11h TE TI/TP TIE
0
0
0
TD1 TD0 Timer control
12h ACS AC6 AC5 AC4 AC3 AC2 AC1 AC0
Analog
calibration
13h RS3 RS2 RS1 RS0
0
0
AL2E OTP
SQW
14h A2IE
0
0
Al2
10M
Alarm2 month
SRAM/Al2 month 01-12
15h RPT24 RPT25 AI2 10 date
16h RPT23 0
AI2 10 hour
17h RPT22
Alarm2 10 minutes
18h RPT21
Alarm2 10 seconds
Alarm2 date
Alarm2 hour
Alarm2 minutes
Alarm2 seconds
SRAM/Al2 date
SRAM/Al2 hour
SRAM/Al2 min
SRAM/Al2 sec
01-31
00-23
00-59
00-59
19h-
1Fh
User SRAM (7 bytes)
SRAM
1. See Table 5: Key to Table 4 (M41T83 clock/control register map (32 bytes)).
2. AF2 will always read ‘0’, if the AL2E bit is set to ‘0’.
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