M45PE20-VMP6TP View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M45PE20-VMP6TP

2 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface

STMicroelectronics 

M45PE20

INSTRUCTIONS

All instructions, addresses and data are shifted in

and out of the device, most significant bit first.

Serial Data Input (D) is sampled on the first rising

edge of Serial Clock (C) after Chip Select (S) is

driven Low. Then, the one-byte instruction code

must be shifted in to the device, most significant bit

first, on Serial Data Input (D), each bit being

latched on the rising edges of Serial Clock (C).

The instruction set is listed in Table 4..

Every instruction sequence starts with a one-byte

instruction code. Depending on the instruction,

this might be followed by address bytes, or by data

bytes, or by both or none.

In the case of a Read Data Bytes (READ), Read

Data Bytes at Higher Speed (Fast_Read) or Read

Status Register (RDSR) instruction, the shifted-in

instruction sequence is followed by a data-out se-

quence. Chip Select (S) can be driven High after

any bit of the data-out sequence is being shifted

out.

In the case of a Page Write (PW), Page Program

(PP), Page Erase (PE), Sector Erase (SE), Write

Enable (WREN), Write Disable (WRDI), Deep

Power-down (DP) or Release from Deep Power-

down (RDP) instruction, Chip Select (S) must be

driven High exactly at a byte boundary, otherwise

the instruction is rejected, and is not executed.

That is, Chip Select (S) must driven High when the

number of clock pulses after Chip Select (S) being

driven Low is an exact multiple of eight.

All attempts to access the memory array during a

Write cycle, Program cycle or Erase cycle are ig-

nored, and the internal Write cycle, Program cycle

or Erase cycle continues unaffected.

Table 4. Instruction Set

Instruction

Description

One-byte Instruction Code

WREN Write Enable

0000 0110

06h

WRDI

Write Disable

0000 0100

04h

RDID

Read Identification

1001 1111

9Fh

RDSR Read Status Register

0000 0101

05h

READ

Read Data Bytes

0000 0011

03h

FAST_READ Read Data Bytes at Higher Speed 0000 1011

0Bh

PW

Page Write

0000 1010

0Ah

PP

Page Program

0000 0010

02h

PE

Page Erase

1101 1011

DBh

SE

Sector Erase

1101 1000

D8h

DP

Deep Power-down

1011 1001

B9h

RDP

Release from Deep Power-down

1010 1011

ABh

Address

Bytes

0

0

0

0

3

3

3

3

3

3

0

0

Dummy

Bytes

0

0

0

0

0

1

0

0

0

0

0

0

Data

Bytes

0

0

1 to 3

1 to ∞

1 to ∞

1 to ∞

1 to 256

1 to 256

0

0

0

0

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