M50FLW040AN5T View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M50FLW040AN5T

4 Mbit (5 x 64KByte Blocks + 3 x 16 x 4KByte Sectors) 3V Supply Firmware Hub / Low Pin Count Flash Memory

STMicroelectronics 

Figure 2. Logic Diagram (FWH/LPC Interface)

VCC VPP

4

ID0-ID31

5

GPI0-

GPI4

4

FWH0/LAD0

FWH3/LAD3

WP

FWH4/LFRAME M50FLW040A

TBL

M50FLW040B

CLK

IC

RP

INIT

VSS

AI08417B

Note: 1. ID3 is Reserved for Future Use (RFU) in LPC mode.

Figure 3. Logic Diagram (A/A Mux Interface)

VCC VPP

11

A0-A10

8

DQ0-DQ7

RC

M50FLW040A

IC

M50FLW040B

RB

G

W

RP

VSS

AI08418B

M50FLW040A, M50FLW040B

Table 1. Signal Names (FWH/LPC Interface)

FWH0/LAD0-

FWH3/LAD3

Input/Output Communications

FWH4/

LFRAME

Input Communication Frame

ID0-ID3

Identification Inputs

GPI0-GPI4

General Purpose Inputs

IC

Interface Configuration

RP

Interface Reset

INIT

CPU Reset

CLK

Clock

TBL

Top Block Lock

WP

Write Protect

RFU

Reserved for Future Use. Leave

disconnected

VCC

Supply Voltage

VPP

Optional Supply Voltage for Fast

Program and Erase Operations

VSS

Ground

NC

Not Connected Internally

Table 2. Signal Names (A/A Mux Interface)

IC

Interface Configuration

A0-A10

Address Inputs

DQ0-DQ7

Data Inputs/Outputs

G

Output Enable

W

Write Enable

RC

Row/Column Address Select

RB

Ready/Busy Output

RP

Interface Reset

VCC

Supply Voltage

VPP

Optional Supply Voltage for Fast

Program and Erase Operations

VSS

Ground

NC

Not Connected Internally

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