M58WR064FT, M58WR064FB
PROGRAM AND ERASE TIMES AND ENDURANCE CYCLES
The Program and Erase times and the number of
Program/ Erase cycles per block are shown in Ta-
ble 14. Exact erase times may change depending
on the memory array condition. The best case is
when all the bits in the block or bank are at ‘0’ (pre-
programmed). The worst case is when all the bits
in the block or bank are at ‘1’ (not prepro-
grammed). Usually, the system overhead is negli-
gible with respect to the erase time.
In the M58WR064FT/B the maximum number of
Program/ Erase cycles depends on the VPP volt-
age supply used.
Table 14. Program/Erase Times and Endurance Cycles
Parameter
Condition
Min
Typical after
Typ 100k W/E Max Unit
Cycles
Parameter Block (4 KWord)(2)
0.3
1
2.5
s
Erase
Preprogrammed
Main Block (32 KWord)
Not Preprogrammed
0.8
3
4
s
1
4
s
Preprogrammed
4.5
s
Bank (4Mbit)
Not Preprogrammed
6
s
Word Program
10
10
100 µs
Program(3) Parameter Block (4 KWord)
32
ms
Main Block (32 KWord)
256
ms
Suspend
Latency
Program
Erase
5
10 µs
5
20 µs
Program/
Main Blocks
Erase Cycles
(per Block) Parameter Blocks
100,000
100,000
cycles
cycles
Parameter Block (4 KWord)
0.25
2.5
s
Erase
Main Block (32 KWord)
0.8
4
s
Bank (4Mbit)
6
s
Word/ Double Word/ Quadruple Word (4)
8
100 µs
Parameter Block (4
Quadruple Word(4)
8
ms
KWord)
Word
32
ms
Program(3)
Quadruple Word(4)
Main Block (32 KWord)
64
ms
Word
256
ms
Quad-Enhanced
Bank (4Mbit)
Factory Program(4)
0.7
s
Quadruple Word(4)
0.5
s
Program/
Main Blocks
Erase Cycles
(per Block) Parameter Blocks
1000 cycles
2500 cycles
Note: 1. TA = –40 to 85°C; VDD = 1.7V to 2.2V; VDDQ = 2.2V to 3.3V.
2. The difference between Preprogrammed and not preprogrammed is not significant (‹30ms).
3. Values are liable to change with the external system-level overhead (command sequence and Status Register polling execution).
4. Measurements performed at 25°C. TA = 25°C ±5°C for Quadruple Word, Double Word and Quadruple Enhanced Factory Program.
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