M95040, M95020, M95010
POWER-UP AND DELIVERY STATE
Power-up State
After Power-up, the device is in the following state:
– low power Stand-by mode
– deselected (after Power-up, a falling edge is re-
quired on Chip Select (S) before any instruc-
tions can be started).
– not in the Hold Condition
– the Write Enable Latch (WEL) is reset to 0
– Write In Progress (WIP) is reset to 0
the BP1 and BP0 bits of the Status Register are
unchanged from the previous power-down (they
are non-volatile bits).
Initial Delivery State
The device is delivered with the memory array set
at all 1s (FFh). The Block Protect (BP1 and BP0)
bits are initialized to 0.
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