M95320-DR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M95320-DR

32-Kbit serial SPI bus EEPROM with high-speed clock

STMicroelectronics 

M95320-W M95320-R M95320-DR

DC and AC parameters

Table 12. Capacitance

Symbol

Parameter

Test conditions(1) Min.

COUT Output capacitance (Q)

VOUT = 0 V

Input capacitance (D)

CIN

Input capacitance (other pins)

VIN = 0 V

VIN = 0 V

1. Sampled only, not 100% tested, at TA = 25 °C and a frequency of 5 MHz.

Max.

8

8

6

Unit

pF

pF

pF

Table 13. Cycling performance by groups of four bytes

Symbol Parameter(1)

Test conditions

Min.

Max.

Unit

Ncycle

Write cycle TA ≤ 25 °C, 1.8 V < VCC < 5.5 V

endurance(2) TA = 85 °C, 1.8 V < VCC < 5.5 V

4,000,000

1,200,000

Write

cycle(3)

1. Cycling performance for products identified by process letter K.

2. The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1,

4*N+2, 4*N+3] where N is an integer. The Write cycle endurance is defined by characterization and

qualification.

3. A Write cycle is executed when either a Page Write, a Byte Write, a WRSR, a WRID or an LID instruction is

decoded. When using the Byte Write, the Page Write or the WRID instruction, refer also to Section 6.6.1:

Cycling with Error Correction Code (ECC).

Table 14. Memory cell data retention

Parameter

Test conditions

Min.

Unit

Data retention(1)

TA = 55 °C

200

Year

1. For products identified by process letter K. The data retention behavior is checked in production. The 200-

year limit is defined from characterization and qualification results.

Doc ID 5711 Rev 14

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