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MAX038CPP View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
MAX038CPP
MaximIC
Maxim Integrated 
MAX038CPP Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
High-Frequency Waveform Generator
CENTER
FREQUENCY
+5V -5V
C1
1µF
C2
1µF
14 16 17 20 4
1
SYNC DV+ V+
REF
V- A1 3
A0
RD
7 DADJ
ROUT
10
19 50
IIN
OUT
8
MAX038
FADJ
RPD
CPD CF
5 COSC
13
PDI
12
PDO
GND GND GND GND GND DGND
2 6 9 11 18 15
RF
OUTPUT
EXTERNAL OSC INPUT
Figure 3. Phase-Locked Loop Using Internal Phase Detector
PDO is a rectangular current-pulse train, alternating
between 0µA and 500µA. It has a 50% duty cycle when
the MAX038 output and PDI are in phase-quadrature
(90° out of phase). The duty cycle approaches 100%
as the phase difference approaches 180° and con-
versely, approaches 0% as the phase difference
approaches 0°. The gain of the phase detector (KD)
can be expressed as:
KD = 0.318 x RPD (volts/radian) [16]
where RPD = phase-detector gain-setting resistor.
When the loop is in lock, the input signals to the phase
detector are in approximate phase quadrature, the duty
cycle is 50%, and the average current at PDO is 250µA
(the current sink of FADJ). This current is divided
between FADJ and RPD; 250µA always goes into FADJ
and any difference current is developed across RPD,
creating VFADJ (both polarities). For example, as the
phase difference increases, PDO duty cycle increases,
the average current increases, and the voltage on RPD
(and VFADJ) becomes more positive. This in turn
decreases the oscillator frequency, reducing the phase
difference, thus maintaining phase lock. The higher
RPD is, the greater VFADJ is for a given phase differ-
ence; in other words, the greater the loop gain, the less
the capture range. The current from PDO must also
charge CPD, so the rate at which VFADJ changes (the
loop bandwidth) is inversely proportional to CPD.
The phase error (deviation from phase quadrature)
depends on the open-loop gain of the PLL and the ini-
tial frequency deviation of the oscillator from the exter-
nal signal source. The oscillator conversion gain (Ko) is:
KO = ωo ÷ VFADJ
[17]
which, from equation [6] is:
KO = 3.43 x ωo (radians/sec)
[18]
The loop gain of the PLL system (KV) is:
KV = KD x KO
[19]
where:
KD = detector gain
KO = oscillator gain.
With a loop filter having a response F(s), the open-loop
transfer function, T(s), is:
T(s) = KD x KO x F(s) ÷ s
[20]
Using linear feedback analysis techniques, the closed-
loop transfer characteristic, H(s), can be related to the
open-loop transfer function as follows:
H(s) = T(s) ÷ [1+ T(s)]
[21]
The transient performance and the frequency response
of the PLL depends on the choice of the filter charac-
teristic, F(s).
When the MAX038 internal phase detector is not used,
PDI and PDO should be connected to GND.
External Phase Detectors
External phase detectors may be used instead of the
internal phase detector. The external phase detector
shown in Figure 4 duplicates the action of the MAX038’s
internal phase detector, but the optional ÷N circuit can
be placed between the SYNC output and the phase
detector in applications requiring synchronizing to an
exact multiple of the external oscillator. The resistor net-
work consisting of R4, R5, and R6 sets the sync range,
while capacitor C4 sets the capture range. Note that
this type of phase detector (with or without the ÷N cir-
cuit) locks onto harmonics of the external oscillator as
well as the fundamental. With no external oscillator
input, this circuit can be unpredictable, depending on
the state of the external input DC level.
Figure 4 shows a frequency phase detector that locks
onto only the fundamental of the external oscillator.
With no external oscillator input, the output of the fre-
quency phase detector is a positive DC voltage, and
the oscillations are at the lowest frequency as set by
R4, R5, and R6.
______________________________________________________________________________________ 13

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