MB81F643242C-60FN View Datasheet(PDF) - Fujitsu

Part Name

Description

Manufacturer

MB81F643242C-60FN

MEMORY CMOS 4 × 512 K × 32 BIT SYNCHRONOUS DYNAMIC RAM

Fujitsu 

MB81F643242C-60/-70/-10 Advanced Info (AE0.1E)

VCC

CAS

CS

TIMING DIAGRAM – 2 : SCITT TEST ENTRY AND EXIT *1

Next power on sequence

and normal operation

Pause 100µs

tTS

tTH

Test Mode

tEPD

H→L

L

CKE

L

*3

*2

Entry

Exit

Notes: *1. If entry and exit operation have not been done correctly, CAS, CS, CKE pins will have some problems.

*2. PRE or PALL commands must not be asserted. Test mode is disable by those commands.

*3. Outputs must be disabled by CS = H or CKE = L before Exit.

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