MB90660A Series
Table 10 Increment and Decrement Instructions (Byte/Word/Long Word) [12 Instructions]
Mnemonic
INC ear
INC eam
# ~ RG B
Operation
2 2 2 0 byte (ear) ← (ear) +1
2+ 5+ (a) 0 2× (b) byte (eam) ← (eam) +1
LH AH I S T N Z V C RMW
–––––* * *– –
–––––* * *– *
DEC ear
DEC eam
INCW ear
INCW eam
2 3 2 0 byte (ear) ← (ear) –1
2+ 5+ (a) 0 2× (b) byte (eam) ← (eam) –1
–––––* * *– –
–––––* * *– *
2 3 2 0 word (ear) ← (ear) +1
–––––* * *– –
2+ 5+ (a) 0 2× (c) word (eam) ← (eam) +1 – – – – – * * * – *
DECW ear
DECW eam
INCL ear
INCL eam
2 3 2 0 word (ear) ← (ear) –1
–––––* * *– –
2+ 5+ (a) 0 2× (c) word (eam) ← (eam) –1 – – – – – * * * – *
2 7 4 0 long (ear) ← (ear) +1
–––––* * *– –
2+ 9+ (a) 0 2× (d) long (eam) ← (eam) +1 – – – – – * * * – *
DECL ear
DECL eam
2 7 4 0 long (ear) ← (ear) –1
2+ 9+ (a) 0 2× (d) long (eam) ← (eam) –1
–––––* * *– –
–––––* * *– *
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Table 11 Compare Instructions (Byte/Word/Long Word) [11 Instructions]
Mnemonic
# ~ RG B
Operation
CMP
CMP
CMP
CMP
A
A, ear
A, eam
A, #imm8
1 10
2 21
2+ 3+ (a) 0
2 20
0 byte (AH) – (AL)
0 byte (A) ← (ear)
(b) byte (A) ← (eam)
0 byte (A) ← imm8
CMPW A
1 10
CMPW A, ear
2 21
CMPW A, eam
2+ 3+ (a) 0
CMPW A, #imm16 3 2 0
0 word (AH) – (AL)
0 word (A) ← (ear)
(c) word (A) ← (eam)
0 word (A) ← imm16
CMPL A, ear
2 62
CMPL A, eam
2+ 7+ (a) 0
CMPL A, #imm32 5 3 0
0 word (A) ← (ear)
(d) word (A) ← (eam)
0 word (A) ← imm32
LH AH I S T N Z V C RMW
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
–––––* * * * –
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
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