MC68HC811L1VFB View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MC68HC811L1VFB

ROM-based high-performance microcontrollers

Freescale Semiconductor 

Freescale Semiconductor, Inc.

SCR[2:0]

000

001

010

011

100

101

110

111

Table 7-2 Baud Rate Selects

Divide

Prescaler

By

1

2

4

8

16

32

64

128

Highest Baud Rate

(Prescaler Output from Previous Table)

4800

9600

38.4 K

4800

9600

38.4 K

2400

4800

19.2 K

1200

2400

9600

600

1200

4800

300

600

2400

150

300

1200

—

150

600

—

—

300

The prescale bits, SCP[1:0], determine the highest baud rate and the SCR[2:0] bits se-

lect an additional binary submultiple (≥1, ≥2, ≥4, through ≥128) of this highest baud

rate. The result of these two dividers in series is the 16 X receiver baud rate clock. The

SCR[2:0] bits are not affected by reset and can be changed at any time, although they

should not be changed when any SCI transfer is in progress.

Figure 7-3 illustrates the SCI baud rate timing chain. The prescale select bits deter-

mine the highest baud rate. The rate select bits determine additional divide by two

stages to arrive at the receiver timing (RT) clock rate. The baud rate clock is the result

of dividing the RT clock by 16.

SERIAL COMMUNICATIONS INTERFACE

TECHNICAL DATA

7-9

For More Information On This Product,

Go to: www.freescale.com

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