S9S08QD4CSC View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

S9S08QD4CSC

8-BIT HCS08 Microcontrollers

Freescale Semiconductor 

Development Support

BDC CLOCK

(TARGET MCU)

HOST DRIVE

TO BKGD PIN

HIGH-IMPEDANCE

TARGET MCU

SPEEDUP PULSE

PERCEIVED START

OF BIT TIME

BKGD PIN

HIGH-IMPEDANCE

R-C RISE

HIGH-IMPEDANCE

10 CYCLES

10 CYCLES

EARLIEST START

OF NEXT BIT

HOST SAMPLES BKGD PIN

Figure 12-3. BDC Target-to-Host Serial Bit Timing (Logic 1)

Figure 12-4 shows the host receiving a logic 0 from the target HCS08 MCU. Because the host is

asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge on

BKGD to the start of the bit time as perceived by the target MCU. The host initiates the bit time but the

target HCS08 finishes it. Because the target wants the host to receive a logic 0, it drives the BKGD pin low

for 13 BDC clock cycles, then briefly drives it high to speed up the rising edge. The host samples the bit

level about 10 cycles after starting the bit time.

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

163

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