S9S08QD4CSC View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

S9S08QD4CSC

8-BIT HCS08 Microcontrollers

Freescale Semiconductor 

Appendix A Electrical Characteristics

A.8 AC Characteristics

This section describes AC timing characteristics for each peripheral system.

A.8.1 Control Timing

Table A-8. Control Timing

Parameter

Symbol

Min

Typical1

Max

Unit

Bus frequency (tcyc = 1/fBus)

Real-time interrupt internal oscillator period

External reset pulse width2

IRQ pulse width

Asynchronous path2

Synchronous path3

KBIPx pulse width

Asynchronous path2

Synchronous path3

Port rise and fall time (load = 50 pF)4

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

fBus

1

—

tRTI

700

—

textrst

100

—

tILIH, tIHIL

100

1.5 tcyc

—

tILIH, tIHIL

100

—

1.5 tcyc

tRise, tFall

—

3

—

30

8

1300

—

—

MHz

μs

ns

ns

—

ns

—

ns

—

BKGD/MS setup time after issuing background debug force

tMSSU

500

—

reset to enter user or BDM modes

—

ns

BKGD/MS hold time after issuing background debug force

tMSH

100

—

reset to enter user or BDM modes 5

—

μs

1 Data in Typical column was characterized at 3.0 V, 25°C.

2 This is the shortest pulse that is guaranteed to be recognized.

3 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or

may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.

4 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 125°C.

5 To enter BDM mode following a POR, BKGD/MS must be held low during the power-up and for a hold time of tMSH after VDD

rises above VLVD.

RESET PIN

textrst

Figure A-12. Reset Timing

MC9S08QD4 Series MCU Data Sheet, Rev. 6

186

Freescale Semiconductor

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