MCF51QM32VFM(2012) View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MCF51QM32VFM
(Rev.:2012)

Embedded - Microcontrollers, Integrated Circuits (ICs)

Freescale Semiconductor 

Num.

2

3

4

5

6

7

8

9

10

11

12

13

Communication interfaces

Table 33. SPI slave mode timing (continued)

Symbol Description

tSPSCK SPSCK period

tLead

tLag

tWSPSCK

tSU

tHI

ta

Enable lead time

Enable lag time

Clock (SPSCK) high or low time

Data setup time (inputs)

Data hold time (inputs)

Slave access time

tdis

Slave MISO disable time

tv

Data valid (after SPSCK edge)

tHO

Data hold time (outputs)

tRI

Rise time input

tFI

Fall time input

tRO

Rise time output

tFO

Fall time output

Min.

4 x tBUS

1

1

tBUS - 30

19.5

0

—

Max.

—

—

—

—

—

—

tBUS

—

tBUS

—

27

0

—

—

tBUS - 25

Unit

ns

tBUS

tBUS

ns

ns

ns

ns

ns

ns

ns

ns

Comment

tBUS = 1/

fBUS

—

—

—

—

—

Time to

data active

from high-

impedanc

e state

Hold time

to high-

impedanc

e state

—

—

—

—

25

ns

—

SS

(INPUT)

SPSCK

(CPOL = 0)

(INPUT)

SPSCK

(CPOL = 1)

(INPUT)

8

MISO

(OUTPUT)

2

12

3

5

5

12

10

nsoetee

SLAVE MSB BIT 6 . . . 1

13 4

13

9

11

11

SLAVE LSB OUT

SEE

NOTE

MOSI

(INPUT)

6

7

MSB IN

BIT 6 . . . 1

LSB IN

NOTE: Not defined!

Figure 18. SPI slave mode timing (CPHA=0)

MCF51QM128 Data Sheet, Rev. 6, 01/2012.

Freescale Semiconductor, Inc.

51

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