MCP25050-E/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

MCP25050-E/SL

Stand-Alone CAN Controller

Microchip Technology 

5.0 GPIO MODULE

5.1 Description

The MCP2502X/5X has eight general-purpose input/

output pins (GP0 to GP7), collectively labeled GPIO. All

GPIO port pins have TTL input levels and full CMOS

output drivers, with the exception of GP7, which is input

only. Pins GP6:GP0 can be individually configured as

input or output via the GPDDR register.

Note:

The GPDDR register controls the direction

of the GPIO pins, even when they are

being used as analog inputs. The user

must ensure that the bits in the GPDDR

register are maintained set (input) when

using them as analog inputs.

Each of the GPIO pins has a weak internal pull-up

resistor. A single control bit (OPTREG.GPPU) can turn

on/off all the pull-ups. The weak pull-up is automatically

turned off when the port pin is configured as an output.

The pull-ups are disabled during a Power-on Reset.

All pins are multiplexed with an alternate function,

including analog-to-digital conversion on up to four of

the GPIO pins, analog VREF inputs up to two pins, PWM

outputs up to two pins, clock-out function and external

reset. The operation of each pin is selected by clearing,

or setting, control bits in various control registers. GPIO

pin functions are summarized in Table 5-1.

TABLE 5-1: GPIO FUNCTIONS

Name

Bit

#

Function

GP0/AN0

GP1/AN1

GP2/AN2/PWM2

GP3/AN3/PWM3

GP4/VREF-

GP5/VREF+

GP6/CLKOUT

GP7/nRST/VPP

bit0 I/O or analog input

bit1 I/O or analog input

bit2 I/O, analog input

or PWM out

bit3 I/O, analog input

or PWM out

bit4 I/O or analog voltage

reference

bit5 I/O or analog voltage

reference

bit6 I/O or Clock output

bit7 Input, external reset input

or programming voltage

input

MCP2502X/5X

5.2 Digital Input Edge Detection

All GPIO pins have a digital input edge detection

feature that will automatically transmit a message when

an edge with the proper polarity occurs on any of the

digital inputs. Only pins configured as inputs and

enabled for this function via control register IOINTPO

will perform this operation.

Note:

Refer to Section 7.4 “A/D Threshold

Detection” for information regarding A/D

channels.

Three control registers are associated with this

function. An enable pin for each GPIO pin resides in the

IOINTEN register. When a bit is set to a '1', the

corresponding GPIO pin is enabled to generate a

transmit-on-change message (TXID2) when an edge of

specified polarity occurs.

The digital edge detection function on a GPIO pin

configured as a digital input is edge triggered. A rising-

edge will generate a transmission if the corresponding

bit in the IOINTPO register is set. A falling-edge will

generate a transmission if the bit is cleared. When a

valid edge appears on the enabled GPIO pin, CAN

message TXID2 is initiated.

The edge-detection function on any given GPIO pin

(configured as a digital input) can wake up the

processor from SLEEP if the corresponding interrupt

enable bit in the IOINTEN register was set prior to

going into SLEEP mode. If a wake-up from SLEEP is

caused in this manner, the device will immediately

initiate a transmit message (TXID2).

© 2007 Microchip Technology Inc.

DS21664D-page 31

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