MCP4162T-502I/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

MCP4162T-502I/SL

7/8-Bit Single/Dual SPI Digital POT with Volatile Memory

Microchip Technology 

MCP413X/415X/423X/425X

TABLE 1-3: SPI REQUIREMENTS FOR SDI/SDO MULTIPLEXED (READ OPERATION ONLY) (2)

Characteristic

Symbol

Min Max Units

Conditions

SCK Input Frequency

CS Active (VIL or VIHH) to SCK↑ input

SCK input high time

FSCK

—

250 kHz VDD = 2.7V to 5.5V

TcsA2scH 60

— ns

TscH

1.8

— us

SCK input low time

TscL

1.8

— ns

Setup time of SDI input to SCK↑ edge

TDIV2scH

40

— ns

Hold time of SDI input from SCK↑ edge

TscH2DIL

40

— ns

CS Inactive (VIH) to SDO output hi-impedance

SDO data output valid after SCK↓ edge

TcsH2DOZ

—

50 ns Note 1

TscL2DOV

—

1.6 us

SDO data output valid after

CS Active (VIL or VIHH)

CS Inactive (VIH) after SCK↓ edge

Hold time of CS Inactive (VIH) to

CS Active (VIL or VIHH)

Note 1: This specification by design.

TssL2doV

—

50 ns

TscH2csI 100 — ns

TcsA2csI

50

— ns

2: This table is for the devices where the SPI’s SDI and SDO pins are multiplexed (SDI/SDO) and a Read

command is issued. This is NOT required for SDI/SDO operation with the Increment, Decrement, or Write

commands. This data rate can be increased by having external pull-up resistors to increase the rising

edges of each bit.

© 2008 Microchip Technology Inc.

DS22060B-page 13

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