MCP4017/18/19
5.4.1 WRITE OPERATION
The write operation requires the START condition,
Control Byte, Acknowledge, Data Byte, Acknowledge
and STOP (or RESTART) condition. The Control (Slave
Address) Byte requires the R/W bit equal to a logic zero
(R/W = “0”) to generate a write sequence. The
MCP4017/18/19 is responsible for generating the
Acknowledge (A) bits.
Data is written to the MCP4017/18/19 after every byte
transfer (during the A bit). If a STOP or RESTART
condition is generated during a data transfer (before
the A bit), the data will not be written to MCP4017/18/
19.
Data bytes may be written after each Acknowledge.
The command is terminated once a Stop (P) condition
occurs. Refer to Figure 5-12 for the write sequence.
For a single byte write, the master sends a STOP or
RESTART condition after the 1st data byte is sent.
The MSb of each Data Byte is a don’t care, since the
wiper register is only 7-bits wide.
Figure 5-14 shows the I2C communication behavior of
the Master Device and the MCP4017/18/19 device and
the resultant I2C bus values.
5.4.2 READ OPERATIONS
The read operation requires the START condition,
Control Byte, Acknowledge, Data Byte, the master
generating the A and STOP condition. The Control
Byte requires the R/W bit equal to a logic one (R/W =
1) to generate a read sequence. The MCP4017/18/19
will A the Slave Address Byte and A all the Data Bytes.
The I2C Master will A the Slave Address Byte and the
last Data Byte. If there are multiple Data Bytes, the I2C
Master will A all Data Bytes except the last Data Byte
(which it will A).
The MCP4017/18/19 maintains control of the SDA
signal until all data bits have been clocked out.
The command is terminated once a Stop (P) condition
occurs. Refer to Figure 5-13 for the read command
sequence. For a single read, the master sends a STOP
or RESTART condition after the 1st data byte (and A
bit) is sent from the slave.
Figure 5-14 shows the I2C communication behavior of
the Master Device and the MCP4017/18/19 device and
the resultant I2C bus values.
Fixed
Address
Read/Write bit (“0” = Write)
S 0 1 0 1 1 1 1 0 A x D6 D5 D4 D3 D2 D1 D0 A x D6 D5 D4 D3 D2 D1 D0 A
Slave Address Byte
Data Byte
Data Byte
STOP bit
x D6 D5 D4 D3 D2 D1 D0 A x D6 D5 D4 D3 D2 D1 D0 A P
Data Byte
Legend
S = Start Condition
P = Stop Condition
A = Acknowledge
X = Don’t Care
R/W = Read/Write bit
D6, D5, D4, D3, D2, D1, D0 = Data bits
FIGURE 5-12:
I2C Write Command Format.
Data Byte
DS22147A-page 38
© 2009 Microchip Technology Inc.