MSC7119VM1200 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MSC7119VM1200

Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC

Freescale Semiconductor 

Ordering Information

3.6 Connectivity Guidelines

This section summarizes the connections and special conditions, such as pull-up or pull-down resistors, for the MSC7119

device. Following are guidelines for signal groups and configuration settings:

• Clock and reset signals.

— SWTE is used to configure the MSC7119 device and is sampled on the deassertion of PORESET, so it should be

tied to VDDC or GND either directly or through pull-up or pull-down resistors until PORESET is deasserted. After

PORESET, this signal can be left floating.

— BM[0–1] configure the MSC7119 device and are sampled until PORESET is deasserted, so they should be tied to

VDDIO or GND either directly or through pull-up or pull-down resistors.

— HRESET should be pulled up.

• Interrupt signals. When used, IRQ pins must be pulled up.

• HDI16 signals.

— When they are configured for open-drain, the HREQ/HREQ or HTRQ/HTRQ signals require a pull-up resistor.

However, these pins are also sampled at power-on reset to determine the HDI16 boot mode and may need to be

pulled down. When these pins must be pulled down on reset and pulled up otherwise, a buffer can be used with

the HRESET signal as the enable.

— When the device boots through the HDI16, the HDDS, HDSP and H8BIT pins should be pulled up or down,

depending on the required boot mode settings.

• Ethernet MAC/TDM2 signals. The MDIO signal requires an external pull-up resistor.

• I2C signals. The SCL and SDA signals, when programmed for I2C, requires an external pull-up resistor.

• General-purpose I/O (GPIO) signals. An unused GPIO pin can be disconnected. After boot, program it as an output

pin.

• Other signals.

— The TEST0 pin must be connected to ground.

— The TPSEL pin should be pulled up to enable debug access via the EOnCE port and pulled down for boundary

scan.

— Pins labelled NO CONNECT (NC) must not be connected.

— When a 16-pin double data rate (DDR) interface is used, the 16 unused data pins should be no connects (floating)

if the used lines are terminated.

— Do not connect DBREQ to DONE (as you would for the MSC8101 device). Connect DONE to one of the EVNT

pins, and DBREQ to HRRQ.

4 Ordering Information

Consult a Freescale Semiconductor sales office or authorized distributor to determine product availability and place an order.

Part

Supply Voltage

Package Type

Pin

Count

Core

Frequency

(MHz)

Solder Spheres

MSC7119

1.2 V core

Molded Array Process-Ball Grid 400

300

Lead-free

2.5 V memory

Array (MAP-BGA)

3.3 V I/O

Lead-bearing

Order Number

MSC7119VM1200

MSC7119VF1200

MSC7119 Data Sheet, Rev. 8

Freescale Semiconductor

57

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