M48Z08, M48Z18
DATA RETENTION MODE
With valid VCC applied, the M48Z08,18 operates as
a conventional BYTEWIDE™ static RAM. Should
the supply voltage decay, the RAM will automat-
ically power-fail deselect, write protecting itself
when VCC falls within the VPFD(max), VPFD(min)
window. All outputs become high impedance, and
all inputs are treated as ”don’t care.”
Note: A power failure during a write cycle may
corrupt data at the currently addressed location, but
does not jeopardize the rest of the RAM’s content.
At voltages below VPFD(min), the user can be as-
sured the memory will be in a write protected state,
provided the VCC fall time is not less than tF. The
M48Z08,18 may respond to transient noise spikes
on VCC that reach into the deselect window during
the time the device is sampling VCC. Therefore,
decoupling of the power supply lines is recom-
mended.
When VCC drops below VSO, the control circuit
switches power to the internal battery which pre-
serves data and powers the clock. The internal
button cell will maintain data in the M48Z08,18 for
an accumulated period of at least 10 years when
VCC is less than VSO. As system power returns and
VCC rises above VSO, the battery is disconnected,
and the power supply is switched to external VCC.
Write protection continues until VCC reaches
VPFD(min). E should be kept high as VCC rises past
VPFD(min) to prevent inadvertent write cycles prior
to processor stabilization. Normal RAM operation
can resume tREC after VCC exceeds VPFD(max).
SYSTEM BATTERY LIFE
The useful life of the battery in the M48Z08,18 is
expected to ultimately come to an end for one of
two reasons: either because it has been discharged
while providing current to the RAM in the battery
back-up mode, or because the effects of aging
render the cell useless before it can actually be
completely discharged. The two effects are virtually
unrelated allowing discharge, or Capacity Con-
sumption, and the effects of aging, or Storage Life,
to be treated as two independentbut simultaneous
mechanisms. The earlier occurring failure mecha-
nism defines the battery system life of the
M48Z08,18.
Figure 9. Predicted Battery Storage Life versus Temperature
50
40
30
t1%
20
AI01399
t50% (AVERAGE)
10
8
6
5
4
3
2
1
20
30
40
50
60
70
80
90
TEMPERATURE (Degrees Celsius)
9/15