MT90866
Data Sheet
AC Electrical Characteristics† - Reference Output Timing
Characteristic
Sym.
Min.
Typ.‡
Max.
1 NREFo Output Delay Time
tROD
20
2 NREFo Clock Period
tRP Same as LREF0-7 Period
3 NREFo Clock High Time
tRH Same as LREF0-7 High Time
4 NREFo Clock Low Time
tRL Same as LREF0-7 Low Time
5 NREFo Clock Rise/Fall Time trREF,
0
12
tfREF
14
6 NREFo Clock Period
tR8KOP
124.9
125
125.1
7 NREFo Clock High Time
tR8KO2H
124.4
124.5
124.6
8 NREFo Clock Low Time
tR8KO2L
488-∆
488
488+∆
9 NREFo Clock High Time
tR8KO15H 124.3
124.4
124.5
10 NREFo Clock Low Time
tR8KO15L 648-∆
648
648+∆
Units
ns
ns
µs
µs
ns
µs
ns
‡ Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
Notes
(DIV1,DIV0) =
(0,0)
in the DOM2
Register
(DIV1,DIV0) =
(0,1) or
(DIV1,DIV0) =
(1,0)
in the DOM2
Register
LREF0-7
(8 KHz)
tROD
ttRRHP
tRL
NREFo
(8 KHz)
trREF
tfREF
Figure 28 - Reference Output Timing Diagram when (DIV1, DIV0) = (0, 0) in DOM2 Register
LREF0-7
(2.048 MHz)
NREFo
(2.048 MHz)
tROD
tRP
tRL
tRH
trREF
tfREF
Figure 29 - Reference Output Timing Diagram when (DIV1, DIV0) = (0, 0) in DOM2 Register
LREF0-7
(1.544 MHz)
NREFo
(1.544 MHz)
tROD
tRP
tRL
trREF
tRH
tfREF
Figure 30 - Reference Input Timing Diagram when (DIV1, DIV0) = (0, 0) in DOM2 Register
LREF0-7
(2.048 MHz)
NREFo
(8 KHz)
tROD
tR8KO2L
trREF
tR8KOP
tfREF
tR8KO2H
Figure 31 - Reference Output Timing Diagram when (DIV1, DIV0) = (1, 0) in DOM2 Register
72
Zarlink Semiconductor Inc.