PIC16C9XX
5.5 PORTE and TRISE Register
PORTE is an digital input only port. Each pin is multi-
plexed with an LCD segment driver. These pins have
Schmitt Trigger input buffers.
Note 1: On a Power-on Reset these pins are con-
figured as LCD segment drivers.
Note 2: To configure the pins as a digital port, the
corresponding bits in the LCDSE register
must be cleared. Any bit set in the LCDSE
register overrides any bit settings in the
corresponding TRIS register.
EXAMPLE 5-5: INITIALIZING PORTE
BCF STATUS,RP0
BSF STATUS,RP1
BCF LCDSE,SE27
BCF LCDSE,SE5
BCF LCDSE,SE9
;Select Bank2
;
;Make all PORTE
;and PORTG<7>
;digital inputs
FIGURE 5-8: PORTE BLOCK DIAGRAM
LCD
Segment Data
LCD Segment
Output Enable
LCD
Common Data
LCD Common
Output Enable
Digital Input/
LCD Output pin
LCDSE<n>
Data Bus
Q
D
Schmitt
Trigger
input
buffer
RD PORT
ENEN
VDD
RD TRIS
TABLE 5-9: PORTE FUNCTIONS
Name
Bit# Buffer Type
RE0/SEG05
bit0
ST
RE1/SEG06
bit1
ST
RE2/SEG07
bit2
ST
RE3/SEG08
bit3
ST
RE4/SEG09
bit4
ST
RE5/SEG10
bit5
ST
RE6/SEG11
bit6
ST
RE7/SEG27
bit7
ST
Legend: ST = Schmitt Trigger input
Function
Digital input or Segment Driver05
Digital input or Segment Driver06
Digital input or Segment Driver07
Digital input or Segment Driver08
Digital input or Segment Driver09
Digital input or Segment Driver10
Digital input or Segment Driver11
Digital input or Segment Driver27 (not available on 64-pin devices)
TABLE 5-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Address Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
09h
PORTE
RE7
RE6
RE5
RE4
RE3
89h
TRISE PORTE Data Direction Control Register
10Dh LCDSE SE29 SE27 SE20
Legend: Shaded cells are not used by PORTE.
SE16
SE12
Bit 2
RE2
SE9
Bit 1
RE1
SE5
Bit 0
RE0
SE0
Value on
Power-on
Reset
Value on all
other resets
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1111
DS30444E - page 38
© 1997 Microchip Technology Inc.