PIC16C9XX
FIGURE 11-7: SPI MODE TIMING (SLAVE MODE WITH CKE = 1)
SS
(not optional)
SCK (CKP = 0)
SCK (CKP = 1)
SDO
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
SDI (SMP = 0)
bit7
bit0
SSPIF
TABLE 11-1: REGISTERS ASSOCIATED WITH SPI OPERATION
Address Name
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
0Bh, 8Bh, INTCON
10Bh, 18Bh
0Ch
PIR1
8Ch
PIE1
GIE
PEIE
T0IE
LCDIF ADIF(1)
—
LCDIE ADIE(1)
—
INTE
RBIE
T0IF
INTF
RBIF 0000 000x
—
SSPIF CCP1IF TMR2IF TMR1IF 00-- 0000
—
SSPIE CCP1IE TMR2IE TMR1IE 00-- 0000
13h
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx
14h
SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000
85h
TRISA
—
— PORTA Data Direction Control Register
--11 1111
87h
TRISC
—
— PORTC Data Direction Control Register
--11 1111
94h
SSPSTAT SMP CKE
D/A
P
S
R/W
UA
BF
0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the SSP in SPI mode.
Note 1: Bits ADIE and ADIF are reserved on the PIC16C923, always maintain these bits clear.
Value on all
other resets
0000 000u
00-- 0000
00-- 0000
uuuu uuuu
0000 0000
--11 1111
--11 1111
0000 0000
DS30444E - page 68
© 1997 Microchip Technology Inc.