PIC16C923T-08I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16C923T-08I/SP

8-Bit CMOS Microcontroller with LCD Driver

Microchip Technology 

PIC16C9XX

11.3.1.3 TRANSMISSION

When the R/W bit of the incoming address byte is set

and an address match occurs, the R/W bit of the

SSPSTAT register is set. The received address is

loaded into the SSPBUF register. The ACK pulse will be

sent on the ninth bit, and pin RC3/SCK/SCL is held low.

The transmit data must be loaded into the SSPBUF

register, which also loads the SSPSR register. Then pin

RC3/SCK/SCL should be enabled by setting bit CKP

(SSPCON<4>). The master must monitor the SCL pin

prior to asserting another clock pulse. The slave

devices may be holding off the master by stretching the

clock. The eight data bits are shifted out on the falling

edge of the SCL input. This ensures that the SDA signal

is valid during the SCL high time (Figure 11-20).

An SSP interrupt is generated for each data transfer

byte. Flag bit SSPIF must be cleared in software, and

the SSPSTAT register is used to determine the status of

the byte. Flag bit SSPIF is set on the falling edge of the

ninth clock pulse.

As a slave-transmitter, the ACK pulse from the mas-

ter-receiver is latched on the rising edge of the ninth

SCL input pulse. If the SDA line was high (not ACK),

then the data transfer is complete. When the ACK is

latched by the slave, the slave logic is reset and the

slave then monitors for another occurrence of the

START bit. If the SDA line was low (ACK), the transmit

data must be loaded into the SSPBUF register, which

also loads the SSPSR register. Then pin

RC3/SCK/SCL should be enabled by setting bit CKP.

FIGURE 11-20: I2C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)

SDA

Receiving Address

R/W = 1

A7 A6 A5 A4 A3 A2 A1

ACK

Transmitting Data ACK

D7 D6 D5 D4 D3 D2 D1 D0

SCL

S

1 2 345 6 7 8 9

1234 56789

Data in

SCL held low

P

sampled

while CPU

responds to SSPIF

SSPIF (PIR1<3>)

cleared in software

BF (SSPSTAT<0>)

From SSP interrupt

SSPBUF is written in software service routine

CKP (SSPCON<4>)

Set bit after writing to SSPBUF

(the SSPBUF must be written-to

before the CKP bit can be set)

DS30444E - page 76

© 1997 Microchip Technology Inc.

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