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JS48F4400PCZ00 View Datasheet(PDF) - Numonyx -> Micron

Part Name
Description
Manufacturer
JS48F4400PCZ00
Numonyx
Numonyx -> Micron 
JS48F4400PCZ00 Datasheet PDF : 102 Pages
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Numonyx™ Wireless Flash Memory (W18)
13.1.7 WP# Lock-Down Control
The Write Protect signal, WP#, adds an additional layer of block security. WP# only
affects blocks that once had the Lock-Down command written to them. After the lock-
down status bit is set for a block, asserting WP# forces that block into the lock-down
state [011] and prevents it from being unlocked. After WP# is deasserted, the block’s
state reverts to locked [111] and software commands can then unlock the block (for
erase or program operations) and subsequently re-lock it. Only device reset or power-
down can clear the lock-down status bit and render WP# ineffective.
Figure 32: Locking Operations Flowchart
Start
Write 60h
Block Address
Write 01,D0,2Fh
Block Address
Write 90h
BBA + 02h
Read Block Lock
Status
Locking No
Change?
Yes
Write FFh
Partition Address
Lock Change
Complete
LOCKING OPERATIONS PROCEDURE
Bus
Command
Operation
Comments
Write
Lock Data = 60h
Setup Addr = Block to lock/unlock/lock-down (BA)
Write
Lock, Data = 01h (Lock block)
Unlock, or
D0h (Unlock block)
Lockdown
2Fh (Lockdown block)
Confirm Addr = Block to lock/unlock/lock-down (BA)
Write Read ID Data = 90h
(Optional) Plane Addr = BBA + 02h
Read Block Lock Block Lock status data
(Optional) Status Addr = BBA + 02h
Standby
(Optional)
Confirm locking change on DQ[1:0].
(See Block Locking State Transitions Table
for valid combinations.)
Write
Read Data = FFh
Array Addr = Any address in same partition
13.2
Note:
Protection Register
The Numonyx Wireless Flash Memory (W18) includes a 128-bit Protection Register. This
protection register is used to increase system security and for identification purposes.
The protection register value can match the flash component to the system’s CPU or
ASIC to prevent device substitution.
The lower 64 bits within the protection register are programmed by Numonyx with a
unique number in each flash device. The upper 64 OTP bits within the protection
register are left for the customer to program. Once programmed, the customer
segment can be locked to prevent further programming.
The individual bits of the user segment of the protection register are OTP, not the
register in total. The user may program each OTP bit individually, one at a time, if
desired. After the protection register is locked, however, the entire user segment is
locked and no more user bits can be programmed.
Datasheet
74
November 2007
Order Number: 290701-18

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