ST52T400G2B6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST52T400G2B6

8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG

STMicroelectronics 

ST52T400/T440/E440/T441

2.2.3 Configuration Registers.

The ST52x400/440/441 Configuration Registers

allow the configuration of all the blocks of the ICU.

Table 2.2 describes the functions and the related

peripherals of the 21 Configuration Registers

available: in order to simplify the concept a mne-

monic name is assigned to each Configuration

Register. The same name is used in VISUAL

FIVETM development tools. By using the load

instructions the Configuration Registers may be

set by using values stored in the Program Memory

(EPROM) or in the RAM.

The assembler instruction LDCE conf,mem loads

the Configuration Register conf with the contents

of memory location mem, inside the currently set

memory page.

The assembler instructions LDCR conf,reg loads

the Configuration Register conf with the contents

of the register (RAM location) reg.

Use and meaning of each register will be

described in further details in the corresponding

section.

Table 2.1 Input Registers

2.2.4 Output Registers.

The Output Registers (OR) consist of 6 registers

containing data for the ICU peripherals including I/

O Ports.

All registers can be specified by using a decimal

address, e.g. 1 identifies the second OR.

By using the LOAD type instructions the Output

Registers (OR) may be set with values stored in

the Program Memory (LDPE) or in the RAM

(LDPR).

The assembler instruction LDPE out,mem loads

the Output Register out with the contents of mem-

ory location mem, inside the currently set memory

page. The assembler instruction LDPR out,reg

loads the Output Register out with the contents of

register (RAM location) reg.

Table 2.3 describes the OR: in order to simplify the

concept a mnemonic name is assigned to each of

the Output Registers. The same name is used in

VISUAL FIVETM development tools. Use and

meaning of each register will be described in fur-

ther details in the corresponding section.

IR MNEMONIC NAME

STACK_POINTER

AC_CHAN0H(*)

AC_CHAN0L(*)

AC_CHAN1H(*)

AC_CHAN1L(*)

AC_CHAN2H(*)

AC_CHAN2L(*)

PERIPHERAL REGISTER

STACK POINTER

Analog Comparator CHANNEL 0 High Byte

Analog Comparator CHANNEL 0 Low Byte

Analog Comparator CHANNEL 1 High Byte

Analog Comparator CHANNEL 1 Low Byte

Analog Comparator CHANNEL 2 High Byte

Analog Comparator CHANNEL 2 Low Byte

ADDRESS

0

1

2

3

4

5

6

AC_CHAN3H(*)

AC_CHAN3L(*)

Analog Comparator CHANNEL 3 High Byte

7

Analog Comparator CHANNEL 3 Low Byte

8

AC_CHAN4H (*)(**)

Analog Comparator CHANNEL 4 High Byte

9

AC_CHAN4L (*)(**)

Analog Comparator CHANNEL 4 Low Byte

10

AC_CHAN5H (*)(**)

Analog Comparator CHANNEL 5 High Byte

11

AC_CHAN5L (*)(**)

Analog Comparator CHANNEL 5 Low Byte

12

AC_STATUS(*)

Analog Comparator Status Register

13

PORT_A

PORT A INPUT REGISTER

14

PORT_B

PORT B INPUT REGISTER

15

PORT_C (**)

PORT C INPUT REGISTER

16

TRIAC_COUNT

TRIAC DRIVER COUNTER Value

17

PWM_COUNT

PWM/TIMER COUNTER Value

18

PWM_STATUS

TIMER STATUS REGISTER

19

(*) Not used on ST52x400xx versions

(**) Not used on ST52x400F/440F441F versions

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