ST52T400 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST52T400

8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG

STMicroelectronics 

ST52T400/T440/E440/T441

10.2 PWM Mode Settings

By using the 16-bit Prescaler (REG_CONF8 and

REG_CONF9), the PWM period can be generated

by dividing the internal master clock, an external

clock signal applied to pin MAIN1, or the mains

voltage frequency, using the circuit of Figure

10.10.

NOTE: The external clock signal applied on

MAIN1 pin must have a frequency that is at least

two times smaller than the internal master clock.

The clock source can be selected by using

REG_CONF10(4) bit, CKSL (Table 10.3).

The period T of the PWM signal Tb (see Figure

10.4) can be calculated with the following formula:

T= 255*Tck

where Tck is the period of the signal in output of

the 16-bit prescaler, according to the value stored

in REG_CONF8 and REG_CONF9 pair (Figure

10.2).

By using a 20 MHz clock master a PWM fre-

quency in the range 1.2 Hz to 78.4KHz may be

obtained (Table 10.1).

Table 10.1 PWM Frequencies

MCLK

Frequencies

5 MHz

10 MHz

20 MHz

1/T

min

max

1.2 Hz

19.6 KHz

0.6 Hz

39.2 KHz

0.3 Hz

78.4 KHz

The value Ton depends on the value set by the

user in the TRIAC_COUNT Register (Output Reg-

ister 9) by using the LDPR instruction. Ton and the

corresponding duty cycle can be calculated from

the following formulas:

Ton=TRIAC_COUNT * Tck

Duty=TRIAC_COUNT / 255

The TRIAC_COUNT value can be changed on fly

but it is updated only at the end of the signal

period. If TRIAC_COUNT value is 255 then Toff is

zero and TROUT signal is always equal to one

during the period T.

According to REG_CONF10(0) configuration reg-

ister bit, POL, the firing pulses polarity must be

set.

IN PWM mode, it is possible to generate a pro-

grammable Interrupt in four different ways:

1) No Interrupt;

2) Interrupt on rising edge of the signal Tb

(INT_R).

3) Interrupt on falling edge of the signal Tb

(INT_F)

4) Interrupt on both edges of the signal Tb.

The Interrupt sources described above are always

active; they can be masked through

REG_CONF0(5:3) bits, INTSL (see Table 4.1).

NOTE: If the Interrupt on the rising edge (INT_R)

is not masked through REG_CONF0(4), the first

Interrupt after the start occurs with a delay of a

time period T. If TRIAC_COUNT is 255 or 0, the

first interrupt after the start (either INT_R and

INT_F) occurs at time T. In any case for

TRIAC_COUNT equal to 255 or 0, INT_R and

INT_F coincide and occur at each control period T.

Figure 10.3 PWM Working Mode

T = 255 * Tck

Ton = INIT_VALUE* Tck

Toff

Tb

TRIACOUT

65/94

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