PCA8582F-2 View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

PCA8582F-2

256 x 8-bit CMOS EEPROMS with I2C-bus interface

Philips Electronics 

Philips Semiconductors

256 x 8-bit CMOS EEPROMS

with I2C-bus interface

Product specification

PCX8582X-2 Family

I2C-BUS CHARACTERISTICS

All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and

VIH with an input voltage swing from VSS to VDD.

SYMBOL

PARAMETER

fSCL

tBUF

tHD;STA

tLOW

tHIGH

tSU;STA

tHD;DAT

tHD;DAT

tSU;DAT

tr

tf

tSU;STO

clock frequency

time the bus must be free before new transmission can start

start condition hold time after which first clock pulse is generated

LOW level clock period

HIGH level clock period

set-up time for start condition

data hold time for bus compatible masters

data hold time for bus devices

data set-up time

SDA and SCL rise time

SDA and SCL fall time

set-up time for stop condition

CONDITIONS MIN. MAX. UNIT

0 100 kHz

4.7 −

µs

4.0 −

µs

4.7 −

µs

4.0 −

µs

repeated start 4.7 −

µs

5−

µs

note 1

0−

ns

250 −

ns

−1

µs

− 300 ns

4.7 −

µs

Note

1. The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be

internally provided by a transmitter.

December 1994

13

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