NXP Semiconductors
PCF8566
Universal LCD driver for low multiplex rates
12. Dynamic characteristics
Table 20. Dynamic characteristics
VSS = 0 V; VDD = 2.5 V to 6.0 V; VLCD = VDD − 2.5 V to VDD − 6.0 V; Tamb = −40 °C to +85 °C; unless otherwise specified. [1]
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Clock
fclk
clock frequency
tclk(H)
tclk(L)
tPD(SYNC_N)
tSYNC_NL
tPD(drv)
HIGH-level clock time
LOW-level clock time
SYNC propagation delay
SYNC LOW time
driver propagation delay
I2C-bus
normal mode;
VDD = 5 V
[2]
125
200
315
kHz
power saving mode;
VDD = 3.5 V
21
31
48
kHz
1
-
-
µs
1
-
-
µs
-
-
400
ns
1
-
-
µs
with test loads;
VLCD = VDD − 5 V
-
-
30
µs
tBUF
bus free time between a STOP and
START condition
4.7
-
-
µs
tHD;STA
tLOW
tHIGH
tSU;STA
hold time (repeated) START condition
low period of the SCL clock
high period of the SCL clock
set-up time for a repeated START
condition
4.0
-
-
µs
4.7
-
-
µs
4.0
-
-
µs
4.7
-
-
µs
tHD;DAT
tSU;DAT
tr
tf
tSU;STO
data hold time
data set-up time
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
set-up time for STOP condition
0
-
250
-
-
-
-
-
4.7
-
-
ns
-
ns
1.0
µs
300
ns
-
µs
[1] All timing values referred to VIH and VIL levels with an input voltage swing of VSS to VDD.
[2] At fclk < 125 kHz, I2C-bus maximum transmission speed is derated.
PCF8566_7
Product data sheet
Rev. 07 — 25 February 2009
© NXP B.V. 2009. All rights reserved.
31 of 48