PIC16LC622T-04 View Datasheet(PDF) - Microchip Technology
Part Name
Description
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PIC16LC622T-04 Datasheet PDF : 128 Pages
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PIC16C62X
4.4 Indirect Addressing, INDF and
FSR Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF
register. Any instruction using the INDF register
actually accesses data pointed to by the File Select
Register (FSR). Reading INDF itself indirectly will
produce 00h. Writing to the INDF register indirectly
results in a no-operation (although STATUS bits may
be affected). An effective 9-bit address is obtained by
concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-9. However, IRP
is not used in the PIC16C62X.
A simple program to clear RAM location 20h-7Fh using
indirect addressing is shown in Example 4-1.
EXAMPLE 4-1: INDIRECT ADDRESSING
NEXT
movlw
movwf
clrf
incf
btfss
goto
0x20
FSR
INDF
FSR
FSR,7
NEXT
CONTINUE:
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FIGURE 4-9:
DIRECT/INDIRECT ADDRESSING PIC16C62X
Direct Addressing
RP1 RP0(1) 6
from opcode
0
Indirect Addressing
IRP(1) 7
FSR register
0
bank select location select
bank select
00
01
10
11
00h
180h
location select
Data
Memory
not used
7Fh
Bank 0
Bank 1 Bank 2
1FFh
Bank 3
For memory map detail see (Figure 4-4, Figure 4-5, Figure 4-6 and Figure 4-7).
Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear.
DS30235J-page 24
2003 Microchip Technology Inc.
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