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PIC16LC622T-20/SS View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16LC622T-20/SS
Microchip
Microchip Technology 
PIC16LC622T-20/SS Datasheet PDF : 128 Pages
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PIC16C62X
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Return from Interrupt
[ label ] RETFIE
None
TOS PC,
1 GIE
None
00
0000 0000 1001
Return from Interrupt. Stack is
POPed and Top of Stack (TOS) is
loaded in the PC. Interrupts are
enabled by setting Global
Interrupt Enable bit, GIE
(INTCON<7>). This is a two-cycle
instruction.
1
2
RETFIE
After Interrupt
PC = TOS
GIE = 1
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
TABLE
Return with Literal in W
[ label ] RETLW k
0 k 255
k (W);
TOS PC
None
11
01xx kkkk kkkk
The W register is loaded with the
eight bit literal 'k'. The program
counter is loaded from the top of
the stack (the return address).
This is a two-cycle instruction.
1
2
CALL TABLE;W contains
table
;offset value
;W now has table value
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
RETLW kn ; End of table
Before Instruction
W = 0x07
After Instruction
W = value of k8
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Return from Subroutine
[ label ] RETURN
None
TOS PC
None
00
0000 0000 1000
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
1
2
RETURN
After Interrupt
PC = TOS
DS30235J-page 70
2003 Microchip Technology Inc.

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