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ST72521AR7TC View Datasheet(PDF) - STMicroelectronics

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ST72521AR7TC Datasheet PDF : 199 Pages
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ST72521M/R/AR
11 INSTRUCTION SET
11.1 ST7 ADDRESSING MODES
The ST7 Core features 17 different addressing
modes which can be classified in 7 main groups:
Addressing Mode
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
Example
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset byte,#5
The ST7 Instruction set is designed to minimize
the number of bytes required per instruction: To do
so, most of the addressing modes may be subdi-
vided in two sub-modes called long and short:
– Long addressing mode is more powerful be-
cause it can use the full 64 Kbyte address space,
however it uses more bytes and more CPU cy-
cles.
– Short addressing mode is less powerful because
it can generally only access page zero (0000h -
00FFh range), but the instruction size is more
compact, and faster. All memory to memory in-
structions use short addressing modes only
(CLR, CPL, NEG, BSET, BRES, BTJT, BTJF,
INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
The ST7 Assembler optimizes the use of long and
short addressing modes.
Table 27. ST7 Addressing Mode Overview
Mode
Inherent
Immediate
Syntax
nop
ld A,#$55
Destination
Pointer
Address
(Hex.)
Pointer Size
(Hex.)
Length
(Bytes)
+0
+1
Short
Direct
ld A,$10
00..FF
+1
Long
Direct
ld A,$1000
0000..FFFF
+2
No Offset Direct Indexed ld A,(X)
00..FF
+0
Short
Direct Indexed ld A,($10,X)
00..1FE
+1
Long
Direct Indexed ld A,($1000,X) 0000..FFFF
+2
Short
Indirect
ld A,[$10]
00..FF
00..FF
byte
+2
Long
Indirect
ld A,[$10.w]
0000..FFFF 00..FF
word
+2
Short
Indirect Indexed ld A,([$10],X)
00..1FE
00..FF
byte
+2
Long
Indirect Indexed ld A,([$10.w],X) 0000..FFFF 00..FF
word
+2
Relative
Direct
jrne loop
PC+/-127
+1
Relative
Bit
Bit
Indirect
Direct
Indirect
jrne [$10]
PC+/-127 00..FF
byte
+2
bset $10,#7
00..FF
+1
bset [$10],#7
00..FF
00..FF
byte
+2
Bit
Direct Relative btjt $10,#7,skip 00..FF
+2
Bit
Indirect Relative btjt [$10],#7,skip 00..FF
00..FF
byte
+3
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