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ST72C104G2B7(2000_11) View Datasheet(PDF) - STMicroelectronics

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Description
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ST72C104G2B7 Datasheet PDF : 140 Pages
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ST72104G, ST72215G, ST72216G, ST72254G
7.6 MAIN CLOCK CONTROLLER (MCC)
The Main Clock Controller (MCC) supplies the
clock for the ST7 CPU and its internal peripherals.
It allows SLOW power saving mode to be man-
aged by the application.
All functions are managed by the Miscellaneous
register 1 (MISCR1).
The MCC block consists of:
s A programmable CPU clock prescaler
s A clock-out signal to supply external devices
The prescaler allows the selection of the main
clock frequency and is controlled by three bits of
the MISCR1: CP1, CP0 and SMS.
The clock-out capability consists of a dedicated
I/O port pin configurable as an fCPU clock output to
drive external devices. It is controlled by the MCO
bit in the MISCR1 register.
See Section 11 "MISCELLANEOUS REGIS-
TERS" on page 36 for more details.
Figure 14. Main Clock Controller (MCC) Block Diagram
fOSC/2
PORT
ALTERNATE
FUNCTION
MISCR1
- - MCO -
- CP1 CP0 SMS
CLOCK TO CAN
PERIPHERAL
MCO
fOSC
DIV 2
DIV 2, 4, 8, 16
fCPU
CPU CLOCK
TO CPU AND
PERIPHERALS
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