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ST62P40BQ1/XXX View Datasheet(PDF) - STMicroelectronics

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ST62P40BQ1/XXX Datasheet PDF : 76 Pages
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ST62T40B/E40B
DIGITAL WATCHDOG (Cont’d)
These instructions test the C bit and Reset the
MCU (i.e. disable the Watchdog) if the bit is set
(i.e. if the Watchdog is active), thus disabling the
Watchdog.
In all modes, a minimum of 28 instructions are ex-
ecuted after activation, before the Watchdog can
generate a Reset. Consequently, user software
Figure 15. Digital Watchdog Block Diagram
should load the watchdog counter within the first
27 instructions following Watchdog activation
(software mode), or within the first 27 instructions
executed following a Reset (hardware activation).
It should be noted that when the GEN bit is low (in-
terrupts disabled), the NMI interrupt is active but
cannot cause a wake up from STOP/WAIT modes.
RESET
Q
RSFF
S
R
-27
DB1.7 LOAD SET
8
DB0
WRITE
RESET
DATA BUS
-2 8
SET
-12
OSCILLATOR
CLOCK
VA00010
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