ST62T85BQ6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST62T85BQ6

8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER

STMicroelectronics 

ST62T85B/E85B

3.5 POWER SAVING MODES

The WAIT and STOP modes have been imple- of the processor core prior to the WAIT instruction,

mented in the ST62xx family of MCUs in order to but also on the kind of interrupt request which is

reduce the product’s electrical consumption during generated. This is described in the following para-

idle periods. These two power saving modes are graphs. The processor core does not generate a

described in the following paragraphs.

delay following the occurrence of the interrupt, be-

3.5.1 WAIT Mode

cause the oscillator clock is still available and no

stabilisation period is necessary.

The MCU goes into WAIT mode as soon as the 3.5.2 STOP Mode

WAIT instruction is executed. The microcontroller

can be considered as being in a “software frozen” If the Watchdog is disabled, STOP mode is availa-

state where the core stops processing the pro- ble. When in STOP mode, the MCU is placed in

gram instructions, the RAM contents and peripher- the lowest power consumption mode. In this oper-

al registers are preserved as long as the power ating mode, the microcontroller can be considered

supply voltage is higher than the RAM retention as being “frozen”, no instruction is executed, the

voltage. In this mode the peripherals are still ac- oscillator is stopped, the RAM contents and pe-

tive.

ripheral registers are preserved as long as the

WAIT mode can be used when the user wants to

) reduce the MCU power consumption during idle

t(s periods, while not losing track of time or the capa-

bility of monitoring external events. The active os-

c cillator is not stopped in order to provide a clock

u signal to the peripherals. Timer counting may be

d enabled as well as the Timer interrupt, before en-

ro tering the WAIT mode: this allows the WAIT mode

to be exited when a Timer interrupt occurs. The

P same applies to other peripherals which use the

te clock signal.

le If the WAIT mode is exited due to a Reset (either

o by activating the external pin or generated by the

s Watchdog), the MCU enters a normal reset proce-

b dure. If an interrupt is generated during WAIT

Obsolete Product(s) - O mode, the MCU’s behaviour depends on the state

power supply voltage is higher than the RAM re-

tention voltage, and the ST62xx core waits for the

occurrence of an external interrupt request or a

Reset to exit the STOP state.

If the STOP state is exited due to a Reset (by acti-

vating the external pin) the MCU will enter a nor-

mal reset procedure. Behaviour in response to in-

terrupts depends on the state of the processor

core prior to issuing the STOP instruction, and

also on the kind of interrupt request that is gener-

ated.

This case will be described in the following para-

graphs. The processor core generates a delay af-

ter occurrence of the interrupt request, in order to

wait for complete stabilisation of the oscillator, be-

fore executing the first instruction.

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