ST62P03CD6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST62P03CD6

8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET

STMicroelectronics 

ST6200C/ST6201C/ST6203C

Opcode Map Summary (Continued)

LOW

8

1000

HI

9

1001

A

1010

B

1011

C

1100

D

1101

E

1110

LOW

F

1111

HI

0

0000

2 JRNZ 4

JP 2

e

abc

1

pcr 2

ext 1

JRNC 4

RES 2

e

b0,rr

pcr 2

b.d 1

JRZ 4

LDI 2

e

rr,nn

pcr 3

imm 1

JRC 4

LD

e

a,(y)

prc 1

ind

0

0000

1

0001

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

DEC 2

JRC 4

LD

e

abc

e

b0,rr

e

x

e

a,rr

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

1

0001

2

0010

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ 4

COM 2

JRC 4

CP

e

abc

e

b4,rr

e

a

e

a,(y)

1

pcr 2

ext 1

pcr 2

b.d 1

pcr

1

prc 1

ind

2

0010

3

0011

2 JRNZ 4

JP 2 JRNC 4

SET 2

e

abc

e

b4,rr e

1

pcr 2

ext 1

pcr 2

b.d 1

JRZ 4

pcr 1

LD 2

x,a

sd 1

JRC 4

e

prc 2

CP

a,rr

dir

3

0011

4

0100

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ 2

e

abc

e

b2,rr

e

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

RETI 2

inh 1

JRC 4

ADD

e

a,(y)

prc 1

ind

4

0100

5

0101

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

DEC 2

JRC 4

ADD

e

abc

e

b2,rr

e

y

e

a,rr

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

5

0101

6

0110

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ 2

e

abc

e

b6,rr

e

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

STOP 2

inh 1

JRC 4

e

prc 1

INC

(y)

ind

6

0110

7

0111

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

LD 2

JRC 4

INC

e

abc

e

b6,rr

e

y,a

e

rr

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

7

0111

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ

8

1000

e

abc

e

b1,rr

e

#

1

pcr 2

ext 1

pcr 2

b.d 1

pcr

2

JRC 4

LD

e

(y),a

1

prc 1

ind

8

1000

9

1001

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

DEC 2

JRC 4

LD

e

abc

e

b1,rr

e

v

e

rr,a

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

9

1001

A

1010

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ 4

RCL 2

JRC 4

AND

e

abc

e

b5,rr

e

a

e

a,(y)

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

inh 1

prc 1

ind

A

1010

B

1011

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

LD 2

JRC 4

AND

e

abc

e

b5,rr

e

v,a

e

a,rr

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

B

1011

C

1100

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ 2

e

abc

e

b3,rr

e

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

RET 2

inh 1

JRC 4

SUB

e

a,(y)

prc 1

ind

C

1100

D

1101

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

DEC 2

JRC 4

SUB

e

abc

e

b3,rr

e

w

e

a,rr

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

D

1101

E

1110

2 JRNZ 4

JP 2 JRNC 4

RES 2

JRZ 2

e

abc

e

b7,rr

e

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

WAIT 2

inh 1

JRC 4

e

prc 1

DEC

(y)

ind

E

1110

F

1111

2 JRNZ 4

JP 2 JRNC 4

SET 2

JRZ 4

LD 2

JRC 4

DEC

e

abc

e

b7,rr

e

w,a

e

rr

1

pcr 2

ext 1

pcr 2

b.d 1

pcr 1

sd 1

prc 2

dir

F

1111

Abbreviations for Addressing Modes: Legend:

dir Direct

# Indicates Illegal Instructions

sd Short Direct

e 5-bit Displacement

imm Immediate

b 3-bit Address

inh Inherent

rr 1-byte Data space address

ext Extended

nn 1-byte immediate data

b.d Bit Direct

abc 12-bit address

bt Bit Test

ee 8-bit Displacement

pcr Program Counter Relative

ind Indirect

Cycles

Operands

Bytes

2

JRC

e

1

prc

Addressing Mode

Mnemonic

57/100

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