PHP5N20E View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

PHP5N20E

PowerMOS transistor

Philips Electronics 

Philips Semiconductors

PowerMOS transistor

Product specification

PHP5N20E

GENERAL DESCRIPTION

N-channel enhancement mode

field-effect power transistor in a

plastic envelope featuring high

avalanche energy capability, stable

blocking voltage, fast switching and

high thermal cycling performance

with low thermal resistance. Intended

for use in Switched Mode Power

Supplies (SMPS), motor control

circuits and general purpose

switching applications.

QUICK REFERENCE DATA

SYMBOL PARAMETER

VDS

ID

Ptot

RDS(ON)

Drain-source voltage

Drain current (DC)

Total power dissipation

Drain-source on-state resistance

MAX.

200

5.0

60

0.9

UNIT

V

A

W

Ω

PINNING - TO220AB

PIN

DESCRIPTION

1 gate

2 drain

3 source

tab drain

PIN CONFIGURATION

tab

1 23

SYMBOL

d

g

s

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

ID

Continuous drain current

IDM

PD

∆PD/∆Tmb

VGS

EAS

IAS

Pulsed drain current

Total dissipation

Linear derating factor

Gate-source voltage

Single pulse avalanche

energy

Peak avalanche current

Tj, Tstg

Operating junction and

storage temperature range

Tmb = 25 ˚C; VGS = 10 V

Tmb = 100 ˚C; VGS = 10 V

Tmb = 25 ˚C

Tmb = 25 ˚C

Tmb > 25 ˚C

VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;

VGS = 10 V

VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;

VGS = 10 V

MIN.

-

-

-

-

-

-

-

-

- 55

MAX.

5

3.5

20

60

0.4

± 30

40

5

175

UNIT

A

A

A

W

W/K

V

mJ

A

˚C

THERMAL RESISTANCES

SYMBOL

Rth j-mb

Rth j-a

PARAMETER

Thermal resistance junction to

mounting base

Thermal resistance junction to

ambient

CONDITIONS

MIN.

-

-

TYP. MAX. UNIT

-

2.5 K/W

60

- K/W

October 1997

1

Rev 1.100

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