PIC10F200T-E/P(2014) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC10F200T-E/P Datasheet PDF : 88 Pages
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PIC10F200/202/204/206
BTFSS
Bit Test f, Skip if Set
Syntax:
Operands:
Operation:
[ label ] BTFSS f,b
0 f 31
0b<7
skip if (f<b>) = 1
Status Affected: None
Description:
If bit ‘b’ in register ‘f’ is ‘1’, then the
next instruction is skipped.
If bit ‘b’ is ‘1’, then the next instruc-
tion fetched during the current
instruction execution, is discarded
and a NOP is executed instead,
making this a 2-cycle instruction.
CALL
Subroutine Call
Syntax:
[ label ] CALL k
Operands:
0 k 255
Operation:
(PC) + 1 Top-of-Stack;
k PC<7:0>;
(STATUS<6:5>) PC<10:9>;
0 PC<8>
Status Affected: None
Description:
Subroutine call. First, return
address (PC + 1) is PUSHed onto
the stack. The 8-bit immediate
address is loaded into PC
bits <7:0>. The upper bits
PC<10:9> are loaded from
STATUS<6:5>, PC<8> is cleared.
CALL is a 2-cycle instruction.
CLRF
Clear f
Syntax:
[ label ] CLRF f
Operands:
0 f 31
Operation:
00h (f);
1Z
Status Affected: Z
Description:
The contents of register ‘f’ are
cleared and the Z bit is set.
CLRW
Clear W
Syntax:
[ label ] CLRW
Operands:
None
Operation:
00h (W);
1Z
Status Affected: Z
Description:
The W register is cleared. Zero bit
(Z) is set.
CLRWDT
Clear Watchdog Timer
Syntax:
[ label ] CLRWDT
Operands:
None
Operation:
00h WDT;
0 WDT prescaler (if assigned);
1 TO;
1 PD
Status Affected: TO, PD
Description:
The CLRWDT instruction resets the
WDT. It also resets the prescaler, if
the prescaler is assigned to the
WDT and not Timer0. Status bits
TO and PD are set.
COMF
Complement f
Syntax:
[ label ] COMF f,d
Operands:
0 f 31
d [0,1]
Operation:
(f) (dest)
Status Affected: Z
Description:
The contents of register ‘f’ are
complemented. If ‘d’ is ‘0’, the
result is stored in the W register. If
‘d’ is ‘1’, the result is stored back in
register ‘f’.
DS40001239F-page 48
2004-2014 Microchip Technology Inc.
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