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PIC10F200-I(2014) View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC10F200-I
(Rev.:2014)
Microchip
Microchip Technology 
PIC10F200-I Datasheet PDF : 88 Pages
First Prev 61 62 63 64 65 66 67 68 69 70 Next Last
PIC10F200/202/204/206
12.3 DC Characteristics: PIC10F200/202/204/206 (Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating temperature -40°C TA +85°C (industrial)
-40°C TA +125°C (extended)
Operating voltage VDD range as described in DC specification
Param.
No.
Sym.
Characteristic
Min.
Typ.† Max. Units
Conditions
VIL Input Low Voltage
I/O ports:
D030
with TTL buffer
Vss
— 0.8
V For all 4.5V VDD 5.5V
D030A
Vss
— 0.15 V
VDD
D031
with Schmitt Trigger
buffer
Vss
— 0.2 VDD V
D032
MCLR, T0CKI
Vss
— 0.2 VDD V
VIH Input High Voltage
I/O ports:
D040
with TTL buffer
2.0
VDD
V 4.5V VDD 5.5V
D040A
0.25 VDD + 0.8 — VDD
V Otherwise
D041
with Schmitt Trigger
buffer
0.8VDD
VDD
V For entire VDD range
D042
MCLR, T0CKI
0.8VDD
VDD
V
D070 IPUR GPIO weak pull-up
50
current(3)
IIL Input Leakage Current(1, 2)
250 400 A VDD = 5V, VPIN = VSS
D060
D061
I/O ports
GP3/MCLR(3)
±0.1 ± 1
A Vss VPIN VDD, Pin at
high-impedance
±0.7 ± 5
A Vss VPIN VDD
Output Low Voltage
D080
I/O ports
— 0.6
V IOL = 8.5 mA, VDD = 4.5V,
-40C to +85C
D080A
— 0.6
V IOL = 7.0 mA, VDD = 4.5V,
-40C to +125C
D090
Output High Voltage
I/O ports(2)
VDD – 0.7
V IOH = -3.0 mA, VDD = 4.5V,
-40C to +85C
D090A
VDD – 0.7
V IOH = -2.5 mA, VDD = 4.5V,
-40C to +125C
Capacitive Loading Specs on Output Pins
D101
All I/O pins
— 50* pF
*
Note 1:
2:
3:
Data in “Typ.” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
These parameters are for design guidance only and are not tested.
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
Negative current is defined as coming out of the pin.
This specification applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage
current of the MCLR circuit is higher than the standard I/O logic.
2004-2014 Microchip Technology Inc.
DS40001239F-page 61

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