PIC10F222-EP View Datasheet(PDF) - Microchip Technology
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PIC10F222-EP Datasheet PDF : 86 Pages
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PIC10F220/222
8.0 SPECIAL FEATURES OF THE
CPU
What sets a microcontroller apart from other proces-
sors are special circuits that deal with the needs of real-
time applications. The PIC10F220/222 microcontrol-
lers have a host of such features intended to maximize
system reliability, minimize cost through elimination of
external components, provide power-saving operating
modes and offer code protection. These features are:
• Reset:
- Power-on Reset (POR)
- Device Reset Timer (DRT)
- Watchdog Timer (WDT)
- Wake-up from Sleep on pin change
• Sleep
• Code Protection
• ID Locations
• In-Circuit Serial Programming™
• Clock Out
The PIC10F220/222 devices have a Watchdog Timer,
which can be shut off only through Configuration bit
WDTE. It runs off of its own RC oscillator for added reli-
ability. When using DRT, there is an 1.125 ms (typical)
delay only on VDD power-up. With this timer on-chip,
most applications need no external Reset circuitry.
The Sleep mode is designed to offer a very low current
Power-Down mode. The user can wake-up from Sleep
through a change on input pins or through a Watchdog
Timer time-out.
8.1 Configuration Bits
The PIC10F220/222 Configuration Words consist of 12
bits. Configuration bits can be programmed to select
various device configurations. One bit is the Watchdog
Timer enable bit, one bit is the MCLR enable bit and
one bit is for code protection (see Register 8-1).
REGISTER 8-1: CONFIG: CONFIGURATION WORD(1)
—
—
—
—
—
—
— MCLRE CP WDTE MCPU IOSCFS
bit 11
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 11-5 Unimplemented: Read as ‘0’
bit 4
MCLRE: GP3/MCLR Pin Function Select bit
1 = GP3/MCLR pin function is MCLR
0 = GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD
bit 3
CP: Code Protection bit
1 = Code protection off
0 = Code protection on
bit 2
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
bit 1
MCPU: Master Clear Pull-up Enable bit(2)
1 = Pull-up disabled
0 = Pull-up enabled
bit 0
IOSCFS: Internal Oscillator Frequency Select bit
1 = 8 MHz
0 = 4 MHz
Note 1: Refer to the “PIC10F220/222 Memory Programming Specification” (DS41266), to determine how to
access the Configuration Word. The Configuration Word is not user addressable during device operation.
2: MCLRE must be a ‘1’ to enable this selection.
© 2007 Microchip Technology Inc.
DS41270E-page 33
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