PIC10F222-E/MC View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC10F222-E/MC

High-Performance Microcontrollers with 8-bit A/D

Microchip Technology 

PIC10F220/222

7.9 A/D Acquisition Requirements

For the ADC to meet its specified accuracy, the charge

holding capacitor (CHOLD) must be allowed to fully

charge to the input channel voltage level. The Analog

Input model is shown in Figure 7-1. The source

impedance (RS) and the internal sampling switch (RSS)

impedance directly affect the time required to charge the

capacitor CHOLD. The sampling switch (RSS) impedance

varies over the device voltage (VDD), see Figure 7-1.

The maximum recommended impedance for analog

sources is 10 kΩ. As the source impedance is

decreased, the acquisition time may be decreased.

EQUATION 7-1: ACQUISITION TIME EXAMPLE

After the analog input channel is selected (or changed),

an A/D acquisition must be done before the conversion

can be started. To calculate the minimum acquisition

time, Equation 7-1 may be used. This equation

assumes that 1/2 LSb error is used (256 steps for the

ADC). The 1/2 LSb error is the maximum error allowed

for the ADC to meet its specified resolution.

Assumptions:

Temperature = 50°C and external impedance of 10 kΩ 5.0V VDD

Tacq = Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient

= TAMP + TC + TCOFF

= 2 μs + TC + [(Temperature - 25°C)(0.05 μs/°C)]

Solving for Tc:

Tc

= CHOLD (RIC + RSS + RS) In(1/512)

= -25pF (l kΩ + 7 kΩ + 10 kΩ ) In(0.00196)

= 2.81 μs

Therefore:

Tacq = 2 μs + 2.81 μs + [(50°C-25°C)(0.0 5μs/°C)]

= 6.06 μs

Note 1: The charge holding capacitor (CHOLD) is not discharged after each conversion.

2: The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin

leakage specification.

FIGURE 7-1:

ANALOG INPUT MODULE

Rs ANx

VDD

VT = 0.6V

RIC ≤ 1k

Sampling

Switch

SS Rss

VA

CPIN

5 pF

VT = 0.6V

I LEAKAGE

± 500 nA

CHOLD = 25 pF

VSS/VREF-

Legend:

CPIN

VT

ILEAKAGE

RIC

SS

CHOLD

= Input Capacitance

= Threshold Voltage

= Leakage current at the pin due

to various junctions

= Interconnect Resistance

= Sampling Switch

= Sample/Hold Capacitance

6V

5V

RSS

VDD 4V

3V

2V

5 6 7 8 9 10 11

Sampling Switch

(kΩ)

DS41270E-page 32

© 2007 Microchip Technology Inc.

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