PIC12F629-I View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC12F629-I

8-Pin FLASH-Based 8-Bit CMOS Microcontrollers

Microchip Technology 

PIC12F629/675

FIGURE 12-11: PIC12F675 A/D CONVERSION TIMING (SLEEP MODE)

BSF ADCON0, GO

134

Q4

A/D CLK

(TOSC/2 + TCY)(1)

131

130

1 TCY

A/D DATA

9

8

76

3

2

1

0

ADRES

ADIF

GO

SAMPLE

132

OLD_DATA

SAMPLING STOPPED

NEW_DATA

1 TCY

DONE

Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the

SLEEP instruction to be executed.

TABLE 12-10: PIC12F675 A/D CONVERSION REQUIREMENTS (SLEEP MODE)

Param

No.

130

130

131

132

Sym

TAD

TAD

TCNV

TACQ

Characteristic

A/D Clock Period

A/D Internal RC

Oscillator Period

Conversion Time

(not including

Acquisition Time)(1)

Acquisition Time

Min

1.6

3.0*

3.0*

2.0*

—

(Note 2)

Typ†

—

—

6.0

4.0

11

11.5

Max Units

Conditions

—

µs VREF ≥ 3.0V

—

µs VREF full range

ADCS<1:0> = 11 (RC mode)

9.0* µs At VDD = 2.5V

6.0* µs At VDD = 5.0V

—

TAD

—

µs

5*

—

—

µs The minimum time is the amplifier

settling time. This may be used if

the “new” input voltage has not

changed by more than 1 LSb (i.e.,

4.1 mV @ 4.096V) from the last

sampled voltage (as stored on

CHOLD).

134

TGO Q4 to A/D Clock

Start

—

TOSC/2 + TCY —

— If the A/D clock source is selected

as RC, a time of TCY is added

before the A/D clock starts. This

allows the SLEEP instruction to be

executed.

* These parameters are characterized but not tested.

† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Note 1: ADRES register may be read on the following TCY cycle.

2: See Section 7.1 for minimum conditions.

 2003 Microchip Technology Inc.

DS41190C-page 103

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