PIC12F629/675
6.0 COMPARATOR MODULE
The PIC12F629/675 devices have one analog
comparator. The inputs to the comparator are
multiplexed with the GP0 and GP1 pins. There is an
on-chip Comparator Voltage Reference that can also
be applied to an input of the comparator. In addition,
GP2 can be configured as the comparator output.
The Comparator Control Register (CMCON), shown
in Register 6-1, contains the bits to control the
comparator.
REGISTER 6-1:
CMCON — COMPARATOR CONTROL REGISTER (ADDRESS: 19h)
U-0
R-0
U-0
R/W-0 R/W-0 R/W-0 R/W-0
—
COUT
—
CINV
CIS
CM2
CM1
bit 7
R/W-0
CM0
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
COUT: Comparator Output bit
When CINV = 0:
1 = VIN+ > VIN-
0 = VIN+ < VIN-
When CINV = 1:
1 = VIN+ < VIN-
0 = VIN+ > VIN-
Unimplemented: Read as ‘0’
CINV: Comparator Output Inversion bit
1 = Output inverted
0 = Output not inverted
CIS: Comparator Input Switch bit
When CM2:CM0 = 110 or 101:
1 = VIN- connects to CIN+
0 = VIN- connects to CIN-
CM2:CM0: Comparator Mode bits
Figure 6-2 shows the Comparator modes and CM2:CM0 bit settings
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
2003 Microchip Technology Inc.
DS41190C-page 35