PIC12F609/615/617/12HV609/615
16.8 DC Characteristics: PIC12F609/615/617/12HV609/615-I (Industrial)
PIC12F609/615/617/12HV609/615-E (Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C TA +85°C for industrial
-40°C TA +125°C for extended
Param
No.
Sym
Characteristic
Min
Typ† Max Units
Conditions
VIL
Input Low Voltage
I/O port:
D030
with TTL buffer
Vss
—
0.8
V 4.5V VDD 5.5V
D030A
Vss
— 0.15 VDD V 2.0V VDD 4.5V
D031
with Schmitt Trigger buffer
Vss
— 0.2 VDD V 2.0V VDD 5.5V
D032
MCLR, OSC1 (RC mode)
VSS
— 0.2 VDD V (NOTE 1)
D033
OSC1 (XT and LP modes)
VSS
—
0.3
V
D033A
OSC1 (HS mode)
VSS
— 0.3 VDD V
VIH
Input High Voltage
I/O ports:
—
D040
with TTL buffer
2.0
—
VDD
V 4.5V VDD 5.5V
D040A
0.25 VDD + 0.8 —
VDD
V 2.0V VDD 4.5V
D041
with Schmitt Trigger buffer
0.8 VDD
—
VDD
V 2.0V VDD 5.5V
D042
MCLR
0.8 VDD
—
VDD
V
D043
OSC1 (XT and LP modes)
1.6
—
VDD
V
D043A
OSC1 (HS mode)
0.7 VDD
—
VDD
V
D043B
IIL
OSC1 (RC mode)
Input Leakage Current(2,3)
0.9 VDD
—
VDD
V (NOTE 1)
D060
D061
I/O ports
GP3/MCLR(3,4)
—
0.1
1
A VSS VPIN VDD,
Pin at high-impedance
—
0.7
5
A VSS VPIN VDD
D063
OSC1
—
D070* IPUR
GPIO Weak Pull-up Current(5)
50
0.1
5
250
400
A VSS VPIN VDD, XT, HS and
LP oscillator configuration
A VDD = 5.0V, VPIN = VSS
VOL
Output Low Voltage
—
—
0.6
V IOL = 7.0 mA, VDD = 4.5V,
-40°C to +125°C
D080
I/O ports
—
—
0.6
V IOL = 8.5 mA, VDD = 4.5V,
-40°C to +85°C
VOH
D090
Output High Voltage
I/O ports(2)
VDD – 0.7
—
—
V IOH = -2.5mA, VDD = 4.5V,
-40°C to +125°C
VDD – 0.7
—
—
V IOH = -3.0 mA, VDD = 4.5V,
-40°C to +85°C
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended to use an external
clock in RC mode.
2: Negative current is defined as current sourced by the pin.
3: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
4: This specification applies to GP3/MCLR configured as GP3 with the internal weak pull-up disabled.
5: This specification applies to all weak pull-up pins, including the weak pull-up found on GP3/MCLR. When GP3/MCLR is
configured as MCLR reset pin, the weak pull-up is always enabled.
6: Applies to PIC12F617 only.
DS41302D-page 152
2010 Microchip Technology Inc.