PIC12F609/615/617/12HV609/615
REGISTER 3-5: PMCON1 – PROGRAM MEMORY CONTROL REGISTER 1 (ADDRESS: 93h)
U-1
U-0
U-0
U-0
U-0
R/W-0
R/S-0
R/S-0
—
—
—
—
—
WREN
WR
RD
bit 7
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘1’
Unimplemented: Read as ‘0’
WREN: Program Memory Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the EEPROM
WR: Write Control bit
1 = Initiates a write cycle to program memory. (The bit is cleared by hardware when write is complete. The
WR bit can only be set (not cleared) in software.)
0 = Write cycle to the Flash memory is complete
RD: Read Control bit
1 = Initiates a program memory read (The read takes one cycle. The RD is cleared in hardware; the RD bit
can only be set (not cleared) in software).
0 = Does not initiate a Flash memory read
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
1 = bit is set
U = Unimplemented bit, read as ‘0’
0 = bit is cleared
x = bit is unknown
2010 Microchip Technology Inc.
DS41302D-page 29