PIC12F609/615/617/12HV609/615
10.2.7 ADC REGISTER DEFINITIONS
The following registers are used to control the operation of the ADC.
REGISTER 10-1: ADCON0: A/D CONTROL REGISTER 0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
ADFM
VCFG
—
CHS2
CHS1
bit 7
R/W-0
CHS0
R/W-0
GO/DONE
R/W-0
ADON
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4-2
bit 1
bit 0
ADFM: A/D Conversion Result Format Select bit
1 = Right justified
0 = Left justified
VCFG: Voltage Reference bit
1 = VREF pin
0 = VDD
Unimplemented: Read as ‘0’
CHS<2:0>: Analog Channel Select bits
000 = Channel 00 (AN0)
001 = Channel 01 (AN1)
010 = Channel 02 (AN2)
011 = Channel 03 (AN3)
100 = CVREF
101 = 0.6V Reference
110 = 1.2V Reference
111 = Reserved. Do not use.
GO/DONE: A/D Conversion Status bit
1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
This bit is automatically cleared by hardware when the A/D conversion has completed.
0 = A/D conversion completed/not in progress
ADON: ADC Enable bit
1 = ADC is enabled
0 = ADC is disabled and consumes no operating current
Note 1: When the CHS<2:0> bits change to select the 1.2V or 0.6V reference, the reference output voltage will
have a transient. If the Comparator module uses this 0.6V reference voltage, the comparator output may
momentarily change state due to the transient.
DS41302D-page 84
2010 Microchip Technology Inc.