PIC16LC65B-20E/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LC65B-20E/SP

8-Bit CMOS Microcontrollers with A/D Converter

Microchip Technology 

PIC16C63A/65B/73B/74B

TABLE 9-4: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1

Address Name Bit 7 Bit 6 Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR,

BOR

Value on

all other

RESETS

0Bh,8Bh

0Ch

INTCON

PIR1

GIE

PEIE

PSPIF(1) ADIF(2)

T0IE

RCIF

INTE

TXIF

RBIE

SSPIF

T0IF

CCP1IF

INTF

TMR2IF

RBIF 0000 000x 0000 000u

TMR1IF 0000 0000 0000 0000

0Dh

PIR2

—

—

—

—

—

—

—

CCP2IF ---- ---0 ---- ---0

8Ch

PIE1

PSPIE(1) ADIE(2) RCIE

TXIE

SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000

8Dh

PIE2

—

—

—

—

—

—

—

CCP2IE ---- ---0 ---- ---0

87h

TRISC

PORTC Data Direction register

1111 1111 1111 1111

0Eh

TMR1L

Holding register for the Least Significant Byte of the 16-bit TMR1 register

xxxx xxxx uuuu uuuu

0Fh

TMR1H Holding register for the Most Significant Byte of the 16-bit TMR1 register

xxxx xxxx uuuu uuuu

10h

T1CON

—

— T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu

15h

CCPR1L Capture/Compare/PWM register1 (LSB)

xxxx xxxx uuuu uuuu

16h

CCPR1H Capture/Compare/PWM register1 (MSB)

xxxx xxxx uuuu uuuu

17h

CCP1CON

—

—

CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000

1Bh

CCPR2L Capture/Compare/PWM register2 (LSB)

xxxx xxxx uuuu uuuu

1Ch

CCPR2H Capture/Compare/PWM register2 (MSB)

xxxx xxxx uuuu uuuu

1Dh

CCP2CON

—

—

CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000

Legend: x = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by Capture and Timer1.

Note 1: The PSP is not implemented on the PIC16C63A/73B; always maintain these bits clear.

2: The A/D is not implemented on the PIC16C63A/65B; always maintain these bits clear.

TABLE 9-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR,

BOR

Value on

all other

RESETS

0Bh,8Bh

0Ch

INTCON

PIR1

GIE

PEIE

PSPIF(1) ADIF(2)

T0IE

RCIF

INTE

TXIF

RBIE

SSPIF

T0IF

CCP1IF

INTF

TMR2IF

RBIF 0000 000x 0000 000u

TMR1IF 0000 0000 0000 0000

0Dh

PIR2

—

—

—

—

—

—

—

CCP2IF ---- ---0 ---- ---0

8Ch

PIE1

PSPIE(1) ADIE(2)

RCIE

TXIE

SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000

8Dh

PIE2

—

—

—

—

—

—

—

CCP2IE ---- ---0 ---- ---0

87h

TRISC PORTC Data Direction register

1111 1111 1111 1111

11h

TMR2

Timer2 Module’s register

0000 0000 0000 0000

92h

PR2

Timer2 Module’s Period register

1111 1111 1111 1111

12h

T2CON

— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000

15h

CCPR1L Capture/Compare/PWM register1 (LSB)

xxxx xxxx uuuu uuuu

16h

CCPR1H Capture/Compare/PWM register1 (MSB)

xxxx xxxx uuuu uuuu

17h

CCP1CON —

—

CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000

1Bh

CCPR2L Capture/Compare/PWM register2 (LSB)

xxxx xxxx uuuu uuuu

1Ch

CCPR2H Capture/Compare/PWM register2 (MSB)

xxxx xxxx uuuu uuuu

1Dh

CCP2CON —

—

CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000

Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PWM and Timer2.

Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear.

2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.

DS30605C-page 54

 2000 Microchip Technology Inc.

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