PIC16LCR66T-04E/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LCR66T-04E/SO

8-Bit CMOS Microcontrollers

Microchip Technology 

PIC16C6X

12.0 UNIVERSAL SYNCHRONOUS

ASYNCHRONOUS RECEIVER

TRANSMITTER (USART)

MODULE

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

The Universal Synchronous Asynchronous Receiver

Transmitter (USART) module is one of the two serial

I/O modules. (USART is also known as a Serial Com-

munications Interface or SCI) The USART can be con-

figured as a full duplex asynchronous system that can

communicate with peripheral devices such as CRT ter-

minals and personal computers, or it can be configured

as a half duplex synchronous system that can commu-

nicate with peripheral devices such as A/D or D/A inte-

grated circuits, Serial EEPROMs etc.

The USART can be configured in the following modes:

• Asynchronous (full duplex)

• Synchronous - Master (half duplex)

• Synchronous - Slave (half duplex)

Bit SPEN (RCSTA<7>) and bits TRISC<7:6> have to

be set in order to configure pins RC6/TX/CK and

RC7/RX/DT as the Universal Synchronous Asynchro-

nous Receiver Transmitter.

FIGURE 12-1: TXSTA: TRANSMIT STATUS AND CONTROL REGISTER (ADDRESS 98h)

R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R-1 R/W-0

CSRC TX9 TXEN SYNC

—

BRGH TRMT TX9D R = Readable bit

bit7

bit0 W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n =Value at POR reset

bit 7: CSRC: Clock Source Select bit

Asynchronous mode

Don’t care

Synchronous mode

1 = Master mode (Clock generated internally from BRG)

0 = Slave mode (Clock from external source)

bit 6:

TX9: 9-bit Transmit Enable bit

1 = Selects 9-bit transmission

0 = Selects 8-bit transmission

bit 5:

TXEN: Transmit Enable bit

1 = Transmit enabled

0 = Transmit disabled

Note: SREN/CREN overrides TXEN in SYNC mode.

bit 4:

SYNC: USART Mode Select bit

1 = Synchronous mode

0 = Asynchronous mode

bit 3: Unimplemented: Read as '0'

bit 2: BRGH: High Baud Rate Select bit

Asynchronous mode

1 = High speed

Note:

For the PIC16C63/R63/65/65A/R65 the asynchronous high speed mode (BRGH = 1) may

experience a high rate of receive errors. It is recommended that BRGH = 0. If you desire a

higher baud rate than BRGH = 0 can support, refer to the device errata for additional infor-

mation or use the PIC16C66/67.

0 = Low speed

Synchronous mode

Unused in this mode

bit 1:

TRMT: Transmit Shift Register Status bit

1 = TSR empty

0 = TSR full

bit 0: TX9D: 9th bit of transmit data. Can be parity bit.

© 1997 Microchip Technology Inc.

DS30234D-page 105

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