PIC16LCRR65T-10I/SS View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16LCRR65T-10I/SS Datasheet PDF : 336 Pages
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PIC16C6X
13.3 Reset
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) - Not on PIC16C61/62/
64/65
Some registers are not affected in any reset condition,
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on MCLR or WDT
Reset, on MCLR reset during SLEEP, and on Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation.
The TO and PD bits are set or cleared differently in dif-
ferent reset situations as indicated in Table 13-7,
Table 13-8, and Table 13-9. These bits are used in soft-
ware to determine the nature of the reset. See
Table 13-12 for a full description of reset states of all
registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 13-9.
On the PIC16C62A/R62/63/R63/64A/R64/65A/R65/
66/67, the MCLR reset path has a noise filter to detect
and ignore small pulses. See parameter #34 for pulse
width specifications.
It should be noted that a WDT Reset does not drive the
MCLR pin low.
FIGURE 13-9: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External Reset
MCLR/VPP pin
WDT
Module
SLEEP
WDT
Time-out
VDD pin
VDD rise
detect
Power-on Reset
(2)
Brown-out
Reset
BODEN
OSC1/
CLKIN
pin
OST/PWRT
OST
10-bit Ripple counter
(1) PWRT
On-chip
RC OSC
10-bit Ripple counter
S
Chip Reset
R
Q
Enable PWRT
(3)
Enable OST
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
2: Brown-out Reset is NOT implemented on the PIC16C61/62/64/65.
3: See Table 13-5 and Table 13-6 for time-out situations.
DS30234D-page 128
© 1997 Microchip Technology Inc.
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