PIC16C6X
TABLE 13-9: STATUS BITS AND THEIR SIGNIFICANCE FOR
PIC16C62A/R62/63/R63/64A/R64/65A/R65/66/67
POR
BOR
TO
0
x
1
0
x
0
0
x
x
1
0
x
1
1
0
1
1
0
1
1
u
1
1
1
Legend: x = unknown, u = unchanged
PD
1
Power-on Reset
x
Illegal, TO is set on a Power-on Reset
0
Illegal, PD is set on a Power-on Reset
x
Brown-out Reset
1
WDT Reset
0
WDT Wake-up
u
MCLR reset during normal operation
0
MCLR reset during SLEEP or interrupt wake-up from SLEEP
TABLE 13-10: RESET CONDITION FOR SPECIAL REGISTERS ON PIC16C61/62/64/65
Program Counter
STATUS
PCON(2)
Power-on Reset
000h
0001 1xxx
---- --0-
MCLR reset during normal operation
000h
000u uuuu
---- --u-
MCLR reset during SLEEP
000h
0001 0uuu
---- --u-
WDT Reset
000h
0000 1uuu
---- --u-
WDT Wake-up
PC + 1
uuu0 0uuu
---- --u-
Interrupt wake-up from SLEEP
PC + 1(1)
uuu1 0uuu
---- --u-
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1: When the wake-up is due to an interrupt and the global enable bit, GIE is set, the PC is loaded with the inter-
rupt vector (0004h) after execution of PC+1.
2: The PCON register is not implemented on the PIC16C61.
TABLE 13-11: RESET CONDITION FOR SPECIAL REGISTERS ON
PIC16C62A/R62/63/R63/64A/R64/65A/R65/66/67
Program Counter
STATUS
PCON
Power-on Reset
000h
0001 1xxx
---- --0x
MCLR reset during normal operation
000h
000u uuuu
---- --uu
MCLR reset during SLEEP
000h
0001 0uuu
---- --uu
WDT Reset
000h
0000 1uuu
---- --uu
Brown-out Reset
000h
0001 1uuu
---- --u0
WDT Wake-up
Interrupt wake-up from SLEEP
PC + 1
PC + 1(1)
uuu0 0uuu
uuu1 0uuu
---- --uu
---- --uu
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1: When the wake-up is due to an interrupt and global enable bit, GIE is set, the PC is loaded with the interrupt
vector (0004h) after execution of PC+1.
© 1997 Microchip Technology Inc.
DS30234D-page 131