PIC16CR62T-20E/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16CR62T-20E/SP

8-Bit CMOS Microcontrollers

Microchip Technology 

PIC16C6X

Figure 17-10: VIH, VIL of MCLR, T0CKI and OSC1

(in RC Mode) vs. VDD ............................... 177

Figure 17-11: VTH (Input Threshold Voltage) of

OSC1 Input (in XT, HS,

and LP Modes) vs. VDD ............................ 177

Figure 17-12: Typical IDD vs. Frequency

(External Clock, 25°C) .............................. 178

Figure 17-13: Maximum IDD vs. Frequency

(External Clock, -40° to +85°C) ................ 178

Figure 17-14: Maximum IDD vs. Frequency

(External Clock, -55° to +125°C) .............. 179

Figure 17-15: WDT Timer Time-out Period vs. VDD........ 179

Figure 17-16: Transconductance (gm) of HS

Oscillator vs. VDD...................................... 179

Figure 17-17: Transconductance (gm) of LP

Oscillator vs. VDD...................................... 180

Figure 17-18: Transconductance (gm) of XT

Oscillator vs. VDD...................................... 180

Figure 17-19: IOH vs. VOH, VDD = 3V .............................. 180

Figure 17-20: IOH vs. VOH, VDD = 5V .............................. 180

Figure 17-21: IOL vs. VOL, VDD = 3V ............................... 181

Figure 17-22: IOL vs. VOL, VDD = 5V ............................... 181

Figure 18-1: Load Conditions for Device

Timing Specifications................................ 188

Figure 18-2: External Clock Timing............................... 189

Figure 18-3: CLKOUT and I/O Timing........................... 190

Figure 18-4: Reset, Watchdog Timer,

Oscillator Start-up Timer and

Power-up Timer Timing ............................ 191

Figure 18-5: Timer0 and Timer1 External

Clock Timings ........................................... 192

Figure 18-6: Capture/Compare/PWM Timings

(CCP1)...................................................... 193

Figure 18-7: Parallel Slave Port Timing

(PIC16C64)............................................... 194

Figure 18-8: SPI Mode Timing ...................................... 195

Figure 18-9: I2C Bus Start/Stop Bits Timing.................. 196

Figure 18-10: I2C Bus Data Timing ................................. 197

Figure 19-1: Load Conditions for Device

Timing Specifications................................ 204

Figure 19-2: External Clock Timing............................... 205

Figure 19-3: CLKOUT and I/O Timing........................... 206

Figure 19-4: Reset, Watchdog Timer,

Oscillator Start-up Timer and

Power-up Timer Timing ............................ 207

Figure 19-5: Brown-out Reset Timing ........................... 207

Figure 19-6: Timer0 and Timer1 External

Clock Timings ........................................... 208

Figure 19-7: Capture/Compare/PWM Timings

(CCP1)...................................................... 209

Figure 19-8: Parallel Slave Port Timing

(PIC16C64A/R64)..................................... 210

Figure 19-9: SPI Mode Timing ...................................... 211

Figure 19-10: I2C Bus Start/Stop Bits Timing.................. 212

Figure 19-11: I2C Bus Data Timing ................................. 213

Figure 20-1: Load Conditions for Device Timing

Specifications............................................ 220

Figure 20-2: External Clock Timing............................... 221

Figure 20-3: CLKOUT and I/O Timing........................... 222

Figure 20-4: Reset, Watchdog Timer, Oscillator

Start-up Timer and Power-up Timer

Timing ....................................................... 223

Figure 20-5: Timer0 and Timer1 External Clock

Timings ..................................................... 224

Figure 20-6: Capture/Compare/PWM Timings

(CCP1 and CCP2) .................................... 225

Figure 20-7: Parallel Slave Port Timing ........................ 226

Figure 20-8: SPI Mode Timing...................................... 227

Figure 20-9: I2C Bus Start/Stop Bits Timing ................. 228

Figure 20-10: I2C Bus Data Timing................................. 229

Figure 20-11: USART Synchronous Transmission

(Master/Slave) Timing .............................. 230

Figure 20-12: USART Synchronous Receive

(Master/Slave) Timing .............................. 230

Figure 21-1: Load Conditions for Device Timing

Specifications ........................................... 236

Figure 21-2: External Clock Timing .............................. 237

Figure 21-3: CLKOUT and I/O Timing .......................... 238

Figure 21-4: Reset, Watchdog Timer, Oscillator

Start-up Timer and Power-up Timer

Timing....................................................... 239

Figure 21-5: Brown-out Reset Timing........................... 239

Figure 21-6: Timer0 and Timer1 External Clock

Timings..................................................... 240

Figure 21-7: Capture/Compare/PWM Timings

(CCP1 and CCP2)................................... 241

Figure 21-8: Parallel Slave Port Timing

(PIC16C65A) ............................................ 242

Figure 21-9: SPI Mode Timing...................................... 243

Figure 21-10: I2C Bus Start/Stop Bits Timing ................. 244

Figure 21-11: I2C Bus Data Timing................................. 245

Figure 21-12: USART Synchronous Transmission

(Master/Slave) Timing .............................. 246

Figure 21-13: USART Synchronous Receive

(Master/Slave) Timing .............................. 246

Figure 22-1: Load Conditions for Device Timing

Specifications ........................................... 252

Figure 22-2: External Clock Timing .............................. 253

Figure 22-3: CLKOUT and I/O Timing .......................... 254

Figure 22-4: Reset, Watchdog Timer, Oscillator

Start-up Timer and Power-up Timer

Timing....................................................... 255

Figure 22-5: Brown-out Reset Timing........................... 255

Figure 22-6: Timer0 and Timer1 External Clock

Timings..................................................... 256

Figure 22-7: Capture/Compare/PWM Timings

(CCP1 and CCP2).................................... 257

Figure 22-8: Parallel Slave Port Timing

(PIC16CR65)............................................ 258

Figure 22-9: SPI Mode Timing...................................... 259

Figure 22-10: I2C Bus Start/Stop Bits Timing ................. 260

Figure 22-11: I2C Bus Data Timing................................. 261

Figure 22-12: USART Synchronous Transmission

(Master/Slave) Timing .............................. 262

Figure 22-13: USART Synchronous Receive

(Master/Slave) Timing .............................. 262

Figure 23-1: Load Conditions for Device Timing

Specifications ........................................... 268

Figure 23-2: External Clock Timing .............................. 269

Figure 23-3: CLKOUT and I/O Timing .......................... 270

Figure 23-4: Reset, Watchdog Timer, Oscillator

Start-up Timer and Power-up Timer

Timing....................................................... 271

Figure 23-5: Brown-out Reset Timing........................... 271

Figure 23-6: Timer0 and Timer1 External Clock

Timings..................................................... 272

Figure 23-7: Capture/Compare/PWM Timings

(CCP1 and CCP2).................................... 273

Figure 23-8: Parallel Slave Port Timing (PIC16C67) .... 274

Figure 23-9: SPI Master Mode Timing (CKE = 0) ......... 275

Figure 23-10: SPI Master Mode Timing (CKE = 1) ......... 275

Figure 23-11: SPI Slave Mode Timing (CKE = 0) ........... 276

DS30234D-page 328

© 1997 Microchip Technology Inc.

Share Link: