PIC16CR67-20E/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16CR67-20E/SO Datasheet PDF : 336 Pages
| |||
PIC16C6X
FIGURE 5-4:
RBPU(2)
Data bus
WR Port
BLOCK DIAGRAM OF THE
RB7:RB4 PINS FOR
PIC16C62A/63/R63/64A/65A/
R65/66/67
VDD
Data Latch
DQ
CK
P
weak
pull-up
I/O
pin(1)
TRIS Latch
DQ
WR TRIS
CK
TTL
Input
Buffer
ST
Buffer
RD TRIS
Latch
QD
FIGURE 5-5:
RBPU(2)
Data bus
WR Port
WR TRIS
BLOCK DIAGRAM OF THE
RB3:RB0 PINS
VDD
Data Latch
DQ
P
weak
pull-up
I/O
CK
pin(1)
TRIS Latch
DQ
CK
TTL
Input
Buffer
RD TRIS
RD Port
QD
EN
Set RBIF
RD Port
EN
Q1
From other
RB7:RB4 pins
QD
EN
RB7:RB6 in serial programming mode
RD Port
Q3
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the RPBU bit (OPTION<7>).
RB0/INT
Schmitt Trigger
Buffer
RD Port
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the RPBU bit (OPTION<7>).
TABLE 5-3: PORTB FUNCTIONS
Name
Bit# Buffer Type Function
RB0/INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
bit0
TTL/ST(1) Input/output pin or external interrupt input. Internal software programmable
weak pull-up.
bit1
TTL
Input/output pin. Internal software programmable weak pull-up.
bit2
TTL
Input/output pin. Internal software programmable weak pull-up.
bit3
TTL
Input/output pin. Internal software programmable weak pull-up.
bit4
TTL
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
bit5
TTL
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
bit6
TTL/ST(2) Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming clock.
bit7
TTL/ST(2) Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in serial programming mode.
TABLE 5-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on all
other resets
06h, 106h PORTB RB7 RB6 RB5 RB4 RB3 RB2
86h, 186h TRISB PORTB Data Direction Register
81h, 181h OPTION RBPU INTEDG T0CS T0SE PSA PS2
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
RB1
PS1
RB0 xxxx xxxx uuuu uuuuu
1111 1111 1111 1111
PS0 1111 1111 1111 1111
DS30234D-page 54
© 1997 Microchip Technology Inc.
Share Link: 